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-rw-r--r--src/armv8/a64.rs4
-rw-r--r--test/armv8/a64.rs4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs
index 37cec04..408bc13 100644
--- a/src/armv8/a64.rs
+++ b/src/armv8/a64.rs
@@ -4804,14 +4804,14 @@ impl Decoder<ARMv8> for InstDecoder {
return Err(DecodeError::InvalidOperand);
};
- inst.opcode = if opcode & 0b1_0000 != 0 {
+ inst.opcode = if opcode2 & 0b1_0000 != 0 {
Opcode::FCMPE
} else {
Opcode::FCMP
};
inst.operands = [
Operand::SIMDRegister(precision, Rn as u16),
- if Rm == 0 {
+ if opcode2 & 0b01000 != 0 { // and, sugguested, Rm == 0
Operand::Immediate(0)
} else {
Operand::SIMDRegister(precision, Rm as u16)
diff --git a/test/armv8/a64.rs b/test/armv8/a64.rs
index 11b42d5..4ee0bff 100644
--- a/test/armv8/a64.rs
+++ b/test/armv8/a64.rs
@@ -3843,8 +3843,8 @@ fn test_openblas_simd_ops() {
([0x20, 0x1c, 0x60, 0x1e], "fcsel d0, d1, d0, ne"),
([0xef, 0x1d, 0x60, 0x1e], "fcsel d15, d15, d0, ne"),
([0x70, 0x22, 0x60, 0x1e], "fcmpe d19, d0"),
- ([0xd8, 0x22, 0x60, 0x1e], "fcmpe d22, 0.0"),
- ([0x08, 0x23, 0x60, 0x1e], "fcmp d24, 0.0"),
+ ([0xd8, 0x22, 0x60, 0x1e], "fcmpe d22, 0x0"), // note, 0x0, not 0.0
+ ([0x08, 0x23, 0x60, 0x1e], "fcmp d24, 0x0"), // note, 0x0, not 0.0
([0x80, 0x28, 0x60, 0x1e], "fadd d0, d4, d0"),
([0x22, 0x4c, 0x60, 0x1e], "fcsel d2, d1, d0, mi"),
([0x21, 0x5c, 0x60, 0x1e], "fcsel d1, d1, d0, pl"),