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-rw-r--r--src/armv8/a64.rs4
-rw-r--r--tests/armv8/a64.rs20
2 files changed, 22 insertions, 2 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs
index 6d3b29f..cdee6d5 100644
--- a/src/armv8/a64.rs
+++ b/src/armv8/a64.rs
@@ -2584,7 +2584,7 @@ impl Display for Opcode {
0b1101 => write!(fmt, "dmb ld"),
0b1110 => write!(fmt, "dmb st"),
0b1111 => write!(fmt, "dmb sy"),
- _ => write!(fmt, "dmb {:x}", option)
+ _ => write!(fmt, "dmb #{}", option)
};
}
Opcode::DSB(option) => {
@@ -2601,7 +2601,7 @@ impl Display for Opcode {
0b1101 => write!(fmt, "dsb ld"),
0b1110 => write!(fmt, "dsb st"),
0b1111 => write!(fmt, "dsb sy"),
- _ => write!(fmt, "dsb {:x}", option)
+ _ => write!(fmt, "dsb #{}", option)
};
}
Opcode::HINT => "hint",
diff --git a/tests/armv8/a64.rs b/tests/armv8/a64.rs
index 3f8c4e4..7f6fd04 100644
--- a/tests/armv8/a64.rs
+++ b/tests/armv8/a64.rs
@@ -58,6 +58,26 @@ fn test_unpredictable() {
}
#[test]
+fn test_barrier() {
+ test_display([0xbf, 0x30, 0x03, 0xd5], "dmb #0");
+ test_display([0xbf, 0x31, 0x03, 0xd5], "dmb oshld");
+ test_display([0xbf, 0x32, 0x03, 0xd5], "dmb oshst");
+ test_display([0xbf, 0x33, 0x03, 0xd5], "dmb osh");
+ test_display([0xbf, 0x34, 0x03, 0xd5], "dmb #4");
+ test_display([0xbf, 0x35, 0x03, 0xd5], "dmb nshld");
+ test_display([0xbf, 0x36, 0x03, 0xd5], "dmb nshst");
+ test_display([0xbf, 0x37, 0x03, 0xd5], "dmb nsh");
+ test_display([0xbf, 0x38, 0x03, 0xd5], "dmb #8");
+ test_display([0xbf, 0x39, 0x03, 0xd5], "dmb ishld");
+ test_display([0xbf, 0x3a, 0x03, 0xd5], "dmb ishst");
+ test_display([0xbf, 0x3b, 0x03, 0xd5], "dmb ish");
+ test_display([0xbf, 0x3c, 0x03, 0xd5], "dmb #12");
+ test_display([0xbf, 0x3d, 0x03, 0xd5], "dmb ld");
+ test_display([0xbf, 0x3e, 0x03, 0xd5], "dmb st");
+ test_display([0xbf, 0x3f, 0x03, 0xd5], "dmb sy");
+}
+
+#[test]
fn test_display_misc() {
test_display(
[0xc0, 0x03, 0x5f, 0xd6],