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-rw-r--r--src/armv7/thumb.rs16
1 files changed, 14 insertions, 2 deletions
diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs
index 1d9d96a..077834a 100644
--- a/src/armv7/thumb.rs
+++ b/src/armv7/thumb.rs
@@ -286,7 +286,13 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d
inst.operands = [
Operand::Reg(Reg::from_u8(rt)),
Operand::Reg(Reg::from_u8(rd)),
- Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, false),
+ if p {
+ Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, w)
+ } else {
+ decoder.unpredictable()?;
+ // p == 0 and w == 0 is impossible, would be tbb/tbh
+ Operand::RegDerefPostindexOffset(Reg::from_u8(rn), imm8 << 2, u, false)
+ },
Operand::Nothing,
];
}
@@ -595,7 +601,13 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d
inst.operands = [
Operand::Reg(Reg::from_u8(rt)),
Operand::Reg(Reg::from_u8(rd)),
- Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, false),
+ if p {
+ Operand::RegDerefPreindexOffset(Reg::from_u8(rn), imm8 << 2, u, w)
+ } else {
+ decoder.unpredictable()?;
+ // p == 0 and w == 0 is impossible, would be tbb/tbh
+ Operand::RegDerefPostindexOffset(Reg::from_u8(rn), imm8 << 2, u, false)
+ },
Operand::Nothing,
];
}