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-rw-r--r--src/armv8/a64.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs
index 37cec04..408bc13 100644
--- a/src/armv8/a64.rs
+++ b/src/armv8/a64.rs
@@ -4804,14 +4804,14 @@ impl Decoder<ARMv8> for InstDecoder {
return Err(DecodeError::InvalidOperand);
};
- inst.opcode = if opcode & 0b1_0000 != 0 {
+ inst.opcode = if opcode2 & 0b1_0000 != 0 {
Opcode::FCMPE
} else {
Opcode::FCMP
};
inst.operands = [
Operand::SIMDRegister(precision, Rn as u16),
- if Rm == 0 {
+ if opcode2 & 0b01000 != 0 { // and, sugguested, Rm == 0
Operand::Immediate(0)
} else {
Operand::SIMDRegister(precision, Rm as u16)