diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/armv7.rs | 2 | ||||
| -rw-r--r-- | src/armv8/a64.rs | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/armv7.rs b/src/armv7.rs index b1ae2ba..3e289b6 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -39,6 +39,7 @@ pub struct NoContext; #[derive(Debug, Copy, Clone, PartialEq, Eq)] #[allow(non_camel_case_types)] #[allow(missing_docs)] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Opcode { Invalid, /* @@ -606,6 +607,7 @@ impl StatusRegMask { /// an operand in an `arm` instruction. #[derive(Clone, Copy, Debug, PartialEq, Eq)] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Operand { /// a general-purpose register. Reg(Reg), diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index 140e616..075efc2 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -1147,7 +1147,7 @@ impl SysOps { #[derive(Copy, Clone, Debug, PartialEq)] #[repr(u16)] #[allow(missing_docs)] -#[non_exhaustive] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Opcode { Invalid, UDF, @@ -2795,6 +2795,7 @@ impl Display for ShiftStyle { /// in practice; no `aarch64` instruction has multiple `Operand::PCOffset` entries, for example. #[derive(Copy, Clone, Debug, PartialEq)] #[repr(C)] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Operand { /// "no operand". since an instruction's `operands` array is always four entries, this is used /// to fill space, if any, after recording an instruction's extant operands. |