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capstone-rs currently binds an old capstone (4.0), where capstone 5.0 is
where much of the armv8.2+ implementation was ported over from LLVM. so,
differential testing is now pointed to a capstone-rs fork pending the
merge of https://github.com/capstone-rust/capstone-rs/pull/172
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fix bitvec syntax changes
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they run in minute or so now
and the thumb mode panics....???
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circumstance.
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* cN instead of crN for control registers
* # for immediates in sys/sysl instructions
* write out ARM system register names in the way the ARM reference manual says
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to support more 0x prefix handling, since yax prints offsets with 0x even if the offset is less than 10
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.... and add tests that exercise movi with an immediate other than 0
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remove a few more exceptions
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also unignore tests that would have caught this
fix test expectation that predated using pc-relative syntax
and fix a test that expected an instruction to be disassembled as "invalid" successfully, rather than returning an error
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disassemblers
sure does include a quasi aarch64-asm-parser
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"improve" rather than "fix" as `pstate.0x3` is hardly as useful as
`msr uao, #3`. but the "pstate field" that had been decoded before was
totally incorrect.
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Correct the shift used to select condition bits and correctly compute the
branch offset.
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