Age | Commit message (Collapse) | Author | |
---|---|---|---|
2020-12-06 | TODONE: adr with add/subtracted offset | iximeow | |
instead of trying to shoehorn in `adr reg, label` syntax like the manual requests, it's much easier to just describe these as `{add, sub} reg, pc, offset` and potentially rewrite `pc, offset` as an `adr reg, label` if a higher-level tool has that kind of information available. | |||
2020-12-06 | propagate up invalid thumb immediate expansion | iximeow | |
2020-12-06 | warning cleanup (test edition) | iximeow | |
add in some simd tests for future neon decoding. these tests are drawn from capstone and may need some subsequent cleanup | |||
2020-12-06 | support CPS (change processor state) and some warming cleanup | iximeow | |
2020-12-06 | add ldc/sdc instructions and a slew of 32b thumb2 tests | iximeow | |
2020-12-06 | support more mul/div variants | iximeow | |
2020-12-06 | thumb parallel addition and subtraction | iximeow | |
2020-12-06 | fill out more missing thumb2 decoder | iximeow | |
2020-12-06 | fix more incomplete cases, report arm instruction length properly | iximeow | |
2020-12-06 | remove "Incomplete" opcode from arm7 non-thumb decoder | iximeow | |
2020-12-06 | fix selection from wrong instr word, clean up .w suffixes | iximeow | |
2020-12-06 | fix regimm masks | iximeow | |
2020-12-06 | numerous one-off mis-specializations, most of ld/prefetch hints | iximeow | |
2020-12-06 | fix off by one in a mask for data-processing (shifted register) | iximeow | |
2020-12-06 | fix incorrect operand selection | iximeow | |
2020-12-06 | use bitvec in thumb decoder | iximeow | |
2020-12-06 | fix some 32-bit thumb2 instructions, hook up .w, `s`, and a few typos | iximeow | |
mostly confusion of pre/post-increment, operand widths, immediate widths, things of that nature | |||
2020-12-06 | add thumb/thumb2 decoding | iximeow | |
16-bit instructions only, for now |