| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-06-25 | Bump yaxpeax-arch and bitvec, allow use of deprecated yaxpeax-arch traits, ↵ | novafacing | |
| fix bitvec syntax changes | |||
| 2024-03-17 | at least armv7t doesnt panic now, but im very uncertain these are right | iximeow | |
| 2022-09-29 | Fix 32-bit conditional thumb branches | Mitchell Johnson | |
| Correct the shift used to select condition bits and correctly compute the branch offset. | |||
| 2022-09-29 | Fix negative unconditional 16-bit thumb branches | Mitchell Johnson | |
| Sign extension shift had an off-by-one error so the sign bit was not being properly extended. | |||
| 2022-09-29 | Fix 32-bit Thumb unconditional branch decoding | Mitchell Johnson | |
| T4 encodings of unconditional branches were not being interpreted correctly (#6), and 32-bit bl/blx instructions were similarly incorrect. Correct the bits selected for op1 and op2 and handle the slightly-unusual i1/i2 sign bit xor for these instructions. | |||
| 2022-01-02 | fix docs that failed to build | iximeow | |
| 2021-09-28 | fix various armv8 and armv8 panics that should be Err. | iximeow | |
| in fact the decoder should _never_ panic. included here are tests that cover the entire 32-bit instruction space and ensure that decoding and display do not panic. these tests run uncomfortably slowly (1168s to decode the 4b "instruction" sequences on my desktop), but verify that panics are no longer an issue. | |||
| 2021-07-06 | update yaxpeax_arch and bump version to 0.1.00.1.0 | iximeow | |
| 2020-12-06 | TODONE: adr with add/subtracted offset | iximeow | |
| instead of trying to shoehorn in `adr reg, label` syntax like the manual requests, it's much easier to just describe these as `{add, sub} reg, pc, offset` and potentially rewrite `pc, offset` as an `adr reg, label` if a higher-level tool has that kind of information available. | |||
| 2020-12-06 | propagate up invalid thumb immediate expansion | iximeow | |
| 2020-12-06 | warning cleanup (test edition) | iximeow | |
| add in some simd tests for future neon decoding. these tests are drawn from capstone and may need some subsequent cleanup | |||
| 2020-12-06 | support CPS (change processor state) and some warming cleanup | iximeow | |
| 2020-12-06 | add ldc/sdc instructions and a slew of 32b thumb2 tests | iximeow | |
| 2020-12-06 | support more mul/div variants | iximeow | |
| 2020-12-06 | thumb parallel addition and subtraction | iximeow | |
| 2020-12-06 | fill out more missing thumb2 decoder | iximeow | |
| 2020-12-06 | fix more incomplete cases, report arm instruction length properly | iximeow | |
| 2020-12-06 | remove "Incomplete" opcode from arm7 non-thumb decoder | iximeow | |
| 2020-12-06 | fix selection from wrong instr word, clean up .w suffixes | iximeow | |
| 2020-12-06 | fix regimm masks | iximeow | |
| 2020-12-06 | numerous one-off mis-specializations, most of ld/prefetch hints | iximeow | |
| 2020-12-06 | fix off by one in a mask for data-processing (shifted register) | iximeow | |
| 2020-12-06 | fix incorrect operand selection | iximeow | |
| 2020-12-06 | use bitvec in thumb decoder | iximeow | |
| 2020-12-06 | fix some 32-bit thumb2 instructions, hook up .w, `s`, and a few typos | iximeow | |
| mostly confusion of pre/post-increment, operand widths, immediate widths, things of that nature | |||
| 2020-12-06 | add thumb/thumb2 decoding | iximeow | |
| 16-bit instructions only, for now | |||
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index : yaxpeax-arm | |
| yaxpeax arm decoder |
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