| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-12-27 | Advanced SIMD Extract | iximeow | |
| 2021-12-27 | fix Advanced SIMD Scalar Three Same | iximeow | |
| 2021-12-27 | significantly expand simd support, correct tests for aliasing | iximeow | |
| 2021-12-17 | expand scalar supportneon | iximeow | |
| 2021-12-04 | significant progress towards the rest of simd | iximeow | |
| 2021-11-20 | quiet some warnings | iximeow | |
| 2021-11-20 | more simd support | iximeow | |
| 2021-11-07 | floating point mov, several data processing ops, compare | iximeow | |
| 2021-10-31 | SIMD load/store (multiple structure) | iximeow | |
| in addition to the decoding support, objdump reporting of `{}` selection of multiple registers seems to be inconsistent. stick to the manual's preferred `{v1, v2, v3, v4}` nomenclature instead of `{v1-v4}`. reorder a few tests in test_openblas_simd_loadstore to group instructions by decode category | |||
| 2021-10-31 | mechanical transform to avoid risk of panicking index | iximeow | |
| 2021-10-30 | support ldp/stp/others, preindex writeback is optional | iximeow | |
| 2021-10-30 | support simd load/store (single structure) | iximeow | |
| 2021-10-26 | add many test cases from openblas, ldnp, stnp | iximeow | |
| 2021-10-26 | ldrsw, correct some bitmasks, more ld/st | iximeow | |
| 2021-10-26 | ubfm/sbfm aliases | iximeow | |
| 2021-10-26 | extr | iximeow | |
| 2021-10-26 | data processing (2 source) | iximeow | |
| 2021-10-25 | madd/msub aliases | iximeow | |
| 2021-10-25 | csneg/csinv aliases | iximeow | |
| 2021-10-25 | fix size of operand for ldpsw | iximeow | |
| 2021-10-25 | fix various inaccuracies in adds/subs | iximeow | |
| 2021-10-25 | shifted/extended add/sub is contingent on bit 21, not 17 | iximeow | |
| the comment was even correct! but the actual check was not. | |||
| 2021-10-25 | correct sbfm/bfm/ubfm and their aliases | iximeow | |
| 2021-10-24 | use correct bitmask to select imm6 | iximeow | |
| 2021-10-24 | constify more of ld/st code, fix incorrect shift size | iximeow | |
| extended register forms of ld*/st* instructions do not shift by 0 or 1, they are an instruction/operand-size-dependent shift amount. | |||
| 2021-10-24 | unsigned immediate encodings do not have signed immediates | iximeow | |
| 2021-10-24 | fix incorrect sign extension for adr and adrp | iximeow | |
| 2021-10-24 | fix sign extension errors in relative instructions | iximeow | |
| 2021-10-24 | normalize a bit more consistently in instruction display | iximeow | |
| 2021-10-21 | remaining 1-source data processing instructions are unallocated | iximeow | |
| 2021-10-21 | fix rev/rev32 | iximeow | |
| 2021-10-21 | data processing (three source) | iximeow | |
| 2021-10-21 | data processing instructions (one source) | iximeow | |
| 2021-10-21 | ccm{n,p} | iximeow | |
| 2021-09-28 | do not publish crates with compilation warnings (bump for 0.1.3 also)0.1.3 | iximeow | |
| 2021-09-28 | handle another unintended panic in display impl | iximeow | |
| 2021-09-28 | fix various armv8 and armv8 panics that should be Err. | iximeow | |
| in fact the decoder should _never_ panic. included here are tests that cover the entire 32-bit instruction space and ensure that decoding and display do not panic. these tests run uncomfortably slowly (1168s to decode the 4b "instruction" sequences on my desktop), but verify that panics are no longer an issue. | |||
| 2021-09-26 | fix unimplemented code paths panicking as unreachable | iximeow | |
| only in a64 decoding really; there wasn't an "Incomplete" error at the time, but now there is. | |||
| 2021-09-14 | Fix display of post-index writeback operands | Jonas Schievink | |
| 2021-07-21 | fix DecodeError impl on builds using yaxpeax-arch+std0.1.1 | iximeow | |
| 2021-07-06 | update yaxpeax_arch and bump version to 0.1.00.1.0 | iximeow | |
| 2021-05-07 | bump yaxpeax-arch to 0.0.5 to drop the termion dep0.0.7 | iximeow | |
| fix interface changes around YaxColors as well | |||
| 2020-12-06 | TODONE: adr with add/subtracted offset | iximeow | |
| instead of trying to shoehorn in `adr reg, label` syntax like the manual requests, it's much easier to just describe these as `{add, sub} reg, pc, offset` and potentially rewrite `pc, offset` as an `adr reg, label` if a higher-level tool has that kind of information available. | |||
| 2020-12-06 | propagate up invalid thumb immediate expansion | iximeow | |
| 2020-12-06 | warning cleanup (test edition) | iximeow | |
| add in some simd tests for future neon decoding. these tests are drawn from capstone and may need some subsequent cleanup | |||
| 2020-12-06 | support CPS (change processor state) and some warming cleanup | iximeow | |
| 2020-12-06 | add ldc/sdc instructions and a slew of 32b thumb2 tests | iximeow | |
| 2020-12-06 | support more mul/div variants | iximeow | |
| 2020-12-06 | thumb parallel addition and subtraction | iximeow | |
| 2020-12-06 | fill out more missing thumb2 decoder | iximeow | |
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index : yaxpeax-arm | |
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