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2021-10-31SIMD load/store (multiple structure)iximeow
in addition to the decoding support, objdump reporting of `{}` selection of multiple registers seems to be inconsistent. stick to the manual's preferred `{v1, v2, v3, v4}` nomenclature instead of `{v1-v4}`. reorder a few tests in test_openblas_simd_loadstore to group instructions by decode category
2021-10-30support ldp/stp/others, preindex writeback is optionaliximeow
2021-10-30support simd load/store (single structure)iximeow
2021-10-26add many test cases from openblas, ldnp, stnpiximeow
2021-10-24normalize a bit more consistently in instruction displayiximeow
2021-10-21data processing (three source)iximeow
2021-10-21data processing instructions (one source)iximeow
2021-10-21ccm{n,p}iximeow
2021-09-28handle another unintended panic in display impliximeow
2021-09-28fix various armv8 and armv8 panics that should be Err.iximeow
in fact the decoder should _never_ panic. included here are tests that cover the entire 32-bit instruction space and ensure that decoding and display do not panic. these tests run uncomfortably slowly (1168s to decode the 4b "instruction" sequences on my desktop), but verify that panics are no longer an issue.
2021-09-26fix unimplemented code paths panicking as unreachableiximeow
only in a64 decoding really; there wasn't an "Incomplete" error at the time, but now there is.
2021-09-14Fix display of post-index writeback operandsJonas Schievink
2021-07-06update yaxpeax_arch and bump version to 0.1.00.1.0iximeow
2020-12-06TODONE: adr with add/subtracted offsetiximeow
instead of trying to shoehorn in `adr reg, label` syntax like the manual requests, it's much easier to just describe these as `{add, sub} reg, pc, offset` and potentially rewrite `pc, offset` as an `adr reg, label` if a higher-level tool has that kind of information available.
2020-12-06warning cleanup (test edition)iximeow
add in some simd tests for future neon decoding. these tests are drawn from capstone and may need some subsequent cleanup
2020-12-06add ldc/sdc instructions and a slew of 32b thumb2 testsiximeow
2020-12-06fix more incomplete cases, report arm instruction length properlyiximeow
2020-12-06fix some 32-bit thumb2 instructions, hook up .w, `s`, and a few typosiximeow
mostly confusion of pre/post-increment, operand widths, immediate widths, things of that nature
2020-12-06add thumb/thumb2 decodingiximeow
16-bit instructions only, for now
2020-03-15armv7 support through neon, some still missing (mainly coproc instrs)iximeow
2020-02-23bring more armv7 tests back to the land of the livingiximeow
2020-02-17strh/ldrh/strht/ldrht and some misc cleanupiximeow
2020-02-17entirely replace armv7 operandsiximeow
Operands was an enum covering all forms of operands and data for each operand for all instructions. this is hard to iterate, and hard to work with when a single operand is the one of interest, so it's now replaced by an array of `Operand` enum instances like other architectures. in the course of this change, several forms of decoding are broken, while adding support for some earlier-unsupported multiplies and instructions like msr and clz also clearly note which document the comments mentioning page numbers/figures is referencing
2020-02-05bump yaxpeax-arch to 0.0.3, make tests stable-friendly0.0.2iximeow
2020-01-18some of the work to get yaxpeax-arm no-stdiximeow
2020-01-12match changes in arch to have Resulty decode, instead of Optioniximeow
2020-01-12update arm to revised decoder traitiximeow
2020-01-12armv7 test casesiximeow
2020-01-12decode blxiximeow
2020-01-12fix issue with incorrectly decoding register shiftsiximeow
2020-01-12add armv8/a64 supportiximeow
2020-01-12found some decode errorsiximeow
2020-01-12fix test breakagesiximeow
2020-01-12fix decode issue with stm/ldm/b, add tests, add display impliximeow