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2024-03-17armv8 no-panic test is now multithreadediximeow
2024-03-17fix uxtb/uxth alias being incorrectly applied with x-size registersiximeow
2024-03-17when decoding invalid opcodes, return errors. better testing for this ↵iximeow
circumstance.
2024-03-17disassembling sb is fine, tests ensure it happens nowiximeow
2024-03-17be more explicit about undefined system instructions being invalidiximeow
2024-03-17system instruction and register improvementsiximeow
* cN instead of crN for control registers * # for immediates in sys/sysl instructions * write out ARM system register names in the way the ARM reference manual says
2024-03-16ldrab and ldraa tests, fix immediate decodingiximeow
2024-03-16test dmb and make immediates shown with the immediate prefixiximeow
2024-03-16fix movi (immediate) to unpack immediate correctlyiximeow
.... and add tests that exercise movi with an immediate other than 0
2024-03-16fix ldrsw register sizeiximeow
also unignore tests that would have caught this fix test expectation that predated using pc-relative syntax and fix a test that expected an instruction to be disassembled as "invalid" successfully, rather than returning an error
2024-03-09improve msr register decodingiximeow
"improve" rather than "fix" as `pstate.0x3` is hardly as useful as `msr uao, #3`. but the "pstate field" that had been decoded before was totally incorrect.
2024-03-09fix armv8 a64 decoder hint instructionsbelovdv
2023-01-31fix 24-bit branch immediate decodingjam1garner
2022-09-29Add a test for issue #3Mitchell Johnson
2022-09-29Add some additional 32-bit thumb branch decode test casesMitchell Johnson
2022-09-29Fix 32-bit conditional thumb branchesMitchell Johnson
Correct the shift used to select condition bits and correctly compute the branch offset.
2022-09-29Fix negative unconditional 16-bit thumb branchesMitchell Johnson
Sign extension shift had an off-by-one error so the sign bit was not being properly extended.
2022-09-29Fix 32-bit Thumb unconditional branch decodingMitchell Johnson
T4 encodings of unconditional branches were not being interpreted correctly (#6), and 32-bit bl/blx instructions were similarly incorrect. Correct the bits selected for op1 and op2 and handle the slightly-unusual i1/i2 sign bit xor for these instructions.
2022-04-08add makefile to test yaxpeax-arch with and without no-stdiximeow
2022-01-02get test situation in orderiximeow