| Age | Commit message (Expand) | Author |
|---|
| 2025-04-13 | initial is 0.1.0 actuallyno-gods-no- | iximeow |
| 2025-04-13 | readme updates | iximeow |
| 2025-04-13 | actually commit the fuzz target and a bit of test binary | iximeow |
| 2025-04-13 | another fuzz victory! | iximeow |
| 2025-04-13 | fuzz cases: only 64 system registers, display should never panic | iximeow |
| 2025-04-13 | seeming good | iximeow |
| 2025-04-13 | some more notes, but a bit of a mess | iximeow |
| 2025-04-13 | cleanup | iximeow |
| 2025-04-13 | the rest of duplexes, oops | iximeow |
| 2025-04-13 | l2 cache management instructions are system and undocumented | iximeow |
| 2025-04-13 | duplex instructions seem to kind of work | iximeow |
| 2025-04-13 | shift plus extenders no longer ambiguous | iximeow |
| 2025-04-13 | the rest of the extenders | iximeow |
| 2025-04-12 | predicated store was RegOffset when it should be RegOffsetInc | iximeow |
| 2025-04-12 | just... decoded predicated loads wrong... | iximeow |
| 2025-04-12 | more instruction extenders | iximeow |
| 2025-04-12 | initial list of extendable instructions, fix memub/memuh decode errors | iximeow |
| 2025-04-12 | initial instruction extender support, more system instructions | iximeow |
| 2025-04-11 | more registers as lower case, pc-relative shown like every other arch | iximeow |
| 2025-04-09 | llvm accepts lowercase register names so LETS GOOOOO | iximeow |
| 2025-04-09 | control, gpr register names, readme | iximeow |
| 2025-04-09 | system control register names, more cleanup | iximeow |
| 2025-04-08 | supervisor mode instructions, control register names | iximeow |
| 2025-04-07 | wowowowow cargo test passes | iximeow |
| 2025-04-07 | it is done (not all system, duplex, extender tho) | iximeow |
| 2025-04-07 | sfrecipa, more test cases, more inst variants | iximeow |
| 2025-04-07 | more test coverage, getting close.. | iximeow |
| 2025-04-07 | more tests and cleanup; sub, instruction labels, sfmpy | iximeow |
| 2025-04-06 | wretched architecture which does not know the light of g*d | iximeow |
| 2025-04-06 | more pmpy, ignore shift_{left,right} with amt=0 | iximeow |
| 2025-04-06 | gross hacks for AddAsl, fix AddMpyi decoding | iximeow |
| 2025-04-06 | more test coverage, gpr conjugates | iximeow |
| 2025-04-06 | shift vs sat order in display, vxaddsubh/vxsubaddh/extractu/decbin | iximeow |
| 2025-04-06 | fix extractu/shuff{e,o}{b,h}, add many test cases, handle AddMpyi | iximeow |
| 2025-04-05 | theoretically all non-system instructions... | iximeow |
| 2025-03-29 | 1101* is all thats left... | iximeow |
| 2025-03-28 | 0b1000..0b1100: DONE! | iximeow |
| 2025-03-23 | shifts and MORE transcription errors :( | iximeow |
| 2025-03-23 | thats 0110... done | iximeow |
| 2025-03-23 | more loop support, transcription errors, etc | iximeow |
| 2025-03-22 | wow 1001... is done now | iximeow |
| 2025-03-22 | more loads, fix wrong dest ops for some loads.. | iximeow |
| 2025-03-22 | warnings-b-gone | iximeow |
| 2025-03-22 | more tests, support more loads/stores | iximeow |
| 2025-03-21 | assign-merge is recorded now, 0100.. is decoded | iximeow |
| 2025-03-19 | moderate progress... | iximeow |
| 2024-12-23 | checkpoint | iximeow |
| 2024-11-10 | some iclass 1100, 1010, 1001 | iximeow |
| 2024-11-10 | encoding table typo fixes, incremental progress | iximeow |
| 2024-10-09 | severe transcription error: many memb were recorded as if they were memw by bits | iximeow |
