aboutsummaryrefslogtreecommitdiff
path: root/README.md
blob: 4e1facfe62d265bd96635e7372ec3d750eaaed8f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
## yaxpeax-power

Power ISA family decoders implemented as part of the yaxpeax project.

`yaxpeax-power` implements traits provided by `yaxpeax-arch`, which are likely
how you want to use this library in a multi-architecture context.

the implementation is guided from several manuals:

* IBM RISC System/6000™ POWERstation and POWERserver Hardware Technical Reference General Information
  - `sha256: a72647be3fcb0a9142e589dd67b805b631a18eff8f5f4d67d84bc53bf4674a16`
* The PowerPC™ Architecture: A SPECIFICATION FOR A NEW FAMILY OF RISC PROCESSORS
  - `sha256: c57c802f0d13db627cbf25639a233b9e5ecc7087f4452850545deff93c928241`
* PowerPC™ Microprocessor Family: The Programming Environments For 32-Bit Microprocessors
  - `sha256: 14115b5d42f266b0374e658b40a72b3845f2cf601942f619fbabae4d2fb6da03`
* PowerPC AS User Instruction Set Architecture Book I, Version 2.00
  - `sha256: 09085c3cb47885e97e2c76da9fd751a0c572986d5a646928388ca95b11d24ef6`
* PowerPC User Instruction Set Architecture v2.01 Book I, `ppc_isa.pdf`
  - `sha256: bba7361c799dedfee1a30a0a93dfbc57a15eec7bead2f1e0703bcdc6feb4c641`
* Power ISA™ Version 2.06 Book I-III, VLE
  - `sha256: b5d5c0ce8d5c776a174724d6b1550289127379c2ddf59bca59e524cf9bdd0ea1`
* AltiVec™ Technology Programming Environments Manual
  - `sha256: c16686d07e509cf059d9d11d7c3c807dea259497fc74d8fced41846f865406cd`

from the work of many others:

* RPCS3:
  - https://github.com/RPCS3/rpcs3/blob/a7d9085/rpcs3/Emu/Cell/PPUOpcodes.h#L146
* Dolphin:
  - https://github.com/dolphin-emu/dolphin/blob/415ec4d/Source/Core/Core/PowerPC/PPCTables.cpp#L36
* Xenia:
  - https://github.com/xenia-project/xenia/blob/e2346ee/tools/ppc-instructions.xml
  - https://github.com/xenia-project/xenia/blob/cc72de0/docs/ppc/vmx128.txt

and binutils as a quick reference for the many versions of POWER and what is supported where.

bytes go in, instructions come out - from `test.rs`:
```rust
let decoder = yaxpeax_power::InstDecoder::default();
let expected = "lvewx vr0, r0, r10";
let data = [0x7c, 0x00, 0x50, 0x8e];
let inst = decoder.decode_slice(&data).unwrap();
assert_eq!(format!("{}", inst), expected);
```

### features

* (mostly) comprehensive support for the Power ISA family and derivatives
* `#[no_std]`
* exists

### (mostly) comprehensive support for the Power ISA family and derivatives

many Power-and-related decoders support one or a few of:

* PowerPC
* PowerPC-64
* Gekko
* Cell
* Xenon

but the Power ISA (and POWER CPU family) is more extensive and somewhat less
linear. the console processors generally are "PowerPC plus extras". but in
fullness some Power extensions are in fact mutually exclusive, and some console
processor implementations are also mutually exclusive in interpretation.

`yaxpeax-power` broadly supports:

* POWER1 / `RS/6000`
* POWER2
* PowerPC (4xx, 6xx, 7xx, RAD750)
* POWER4
* Gekko (GameCube, Wii)
* Cell (PS3)
* Xenon (Xbox 360)
* A2 (probably!?)
* Power ISA v2.0-v2.05
* Power ISA v2.06 (mostly)

given Power v2.00 and later discuss _Categories_ of instructions which may be
optional or in some cases mutually exclusive, not many individual Power
implementations enumerated as options on `IsaVersion`. many implementations
*should*, nevertheless, be able to be decoded. in particular the RAD6000,
RAD750, RAD5500, and should all be expressed workably. yours truly would have a
whole heck of a lot of fun emulating the firmware from NASA missions..

to date, the last manual i have made a point to cover is Power ISA v2.07. in
addition, the VSX extensions added in v2.06 are not supported yet. the v3.*
variants of `IsaVersion` are aspirational, but are correct for the set of
instructions which they've inherited from previous Power ISA versions; they
are subsets of the full architecture, but should not be incorrect.

#### TODO

first and foremost, VSX as in Power v2.06, VSX-2 as in Power v2.07, VSX-3 as in
Power v3.0. other net-new instructions in v3.0 and later need attention as well.

variable-length instructions (VLE) are not yet supported, nor are several
embedded-specific instructions, like any of the external PID load/store.

### `#[no_std]`

like other `yaxpeax-*` family decoders, the crate supports no-std use. but if
you're going to build it in that configuration, i'd like to hear about it and
what you're doing with it! thanks in advance.

## shoutouts

in addition the manuals and their mirrors above, the one-off Power
implementations supported here are documented largely via the work of people
and projects interested in understanding and preserving those systems. absent
Xenia, RPCS3, or Dolphin, i would probably be reduced to linking to Ars
Technica articles from 2005 mentioning that the Xenon has a one-off VMX128
extension and some D3D instructions.

some others have written about or collected notes on _Interesting_ Power
implementations:

* devever.net on PowerPC AS Tagged Memory Extensions: https://www.devever.net/~hl/ppcas
* David Kanter on the PA6T-1682M: https://www.realworldtech.com/pa-semi/
* org wrote PPCD, which `yaxpeax-power`'s "Gekko" is tested against: https://github.com/ogamespec/ppcd