support salc, get segment register numbers right

6 files changed, 38 insertions, 12 deletions

diff --git a/src/long_mode/display.rs b/src/long_mode/display.rs
index 090fce2..e653399 100644
--- a/src/long_mode/display.rs
+++ b/src/long_mode/display.rs
@@ -125,7 +125,7 @@ const REG_NAMES: &[&'static str] = &[
     "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b",
     "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15",
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7", "dr8", "dr9", "dr10", "dr11", "dr12", "dr13", "dr14", "dr15",
-    "cs", "ds", "es", "fs", "gs", "ss", "", "",
+    "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
@@ -1122,6 +1122,7 @@ const MNEMONICS: &[&'static str] = &[
     "wrfsbase",
     "wrgsbase",
     "crc32",
+    "salc",
     "xlat",
 
     "f2xm1",
@@ -1960,6 +1961,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::FCMOVNE |
             Opcode::FCMOVNU |
             Opcode::FCMOVU |
+            Opcode::SALC |
             Opcode::SETO |
             Opcode::SETNO |
             Opcode::SETB |
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 3fcf4ab..4d663d3 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -158,12 +158,12 @@ impl RegSpec {
 
     #[inline]
     pub fn fs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 3 }
+        RegSpec { bank: RegisterBank::S, num: 4 }
     }
 
     #[inline]
     pub fn gs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 4 }
+        RegSpec { bank: RegisterBank::S, num: 5 }
     }
 
     #[inline]
@@ -1450,6 +1450,7 @@ pub enum Opcode {
     WRGSBASE,
 
     CRC32,
+    SALC,
     XLAT,
 
     F2XM1,
@@ -5200,7 +5201,7 @@ const OPCODES: [OpcodeRecord; 256] = [
     OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd3_Ev_CL),
     OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
     OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
-    OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
+    OpcodeRecord(Interpretation::Instruction(Opcode::SALC), OperandCode::Nothing),
     // XLAT
     OpcodeRecord(Interpretation::Instruction(Opcode::XLAT), OperandCode::Nothing),
     // x86 d8
diff --git a/src/protected_mode/display.rs b/src/protected_mode/display.rs
index 171118a..c92737b 100644
--- a/src/protected_mode/display.rs
+++ b/src/protected_mode/display.rs
@@ -123,7 +123,7 @@ const REG_NAMES: &[&'static str] = &[
     "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
     "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
     "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
-    "cs", "ds", "es", "fs", "gs", "ss", "", "",
+    "es", "cs", "ss", "ds", "fs", "gs", "", "",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7", "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
     "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7", "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
@@ -1113,6 +1113,7 @@ const MNEMONICS: &[&'static str] = &[
     "wrfsbase",
     "wrgsbase",
     "crc32",
+    "salc",
     "xlat",
 
     "f2xm1",
@@ -1968,6 +1969,7 @@ impl <T: fmt::Write, Color: fmt::Display, Y: YaxColors<Color>> Colorize<T, Color
             Opcode::FCMOVNE |
             Opcode::FCMOVNU |
             Opcode::FCMOVU |
+            Opcode::SALC |
             Opcode::SETO |
             Opcode::SETNO |
             Opcode::SETB |
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 8ac87be..42595a8 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -112,32 +112,32 @@ impl RegSpec {
 
     #[inline]
     pub fn cs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 0 }
+        RegSpec { bank: RegisterBank::S, num: 1 }
     }
 
     #[inline]
     pub fn ds() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 1 }
+        RegSpec { bank: RegisterBank::S, num: 3 }
     }
 
     #[inline]
     pub fn es() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 2 }
+        RegSpec { bank: RegisterBank::S, num: 0 }
     }
 
     #[inline]
     pub fn ss() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 5 }
+        RegSpec { bank: RegisterBank::S, num: 2 }
     }
 
     #[inline]
     pub fn fs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 3 }
+        RegSpec { bank: RegisterBank::S, num: 4 }
     }
 
     #[inline]
     pub fn gs() -> RegSpec {
-        RegSpec { bank: RegisterBank::S, num: 4 }
+        RegSpec { bank: RegisterBank::S, num: 5 }
     }
 
     #[inline]
@@ -1407,6 +1407,7 @@ pub enum Opcode {
     WRGSBASE,
 
     CRC32,
+    SALC,
     XLAT,
 
     F2XM1,
@@ -5149,7 +5150,7 @@ const OPCODES: [OpcodeRecord; 256] = [
     OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::ModRM_0xd3_Ev_CL),
     OpcodeRecord(Interpretation::Instruction(Opcode::AMX), OperandCode::Ib),
     OpcodeRecord(Interpretation::Instruction(Opcode::ADX), OperandCode::Ib),
-    OpcodeRecord(Interpretation::Instruction(Opcode::Invalid), OperandCode::Nothing),
+    OpcodeRecord(Interpretation::Instruction(Opcode::SALC), OperandCode::Nothing),
     // XLAT
     OpcodeRecord(Interpretation::Instruction(Opcode::XLAT), OperandCode::Nothing),
     // x86 d8
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index ee20c47..25c8deb 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -1073,6 +1073,16 @@ fn test_mov() {
     test_display(&[0x0f, 0x97, 0xc8], "seta al");
     test_display(&[0x0f, 0x97, 0x00], "seta [rax]");
     test_display(&[0x0f, 0x97, 0x08], "seta [rax]");
+    test_display(&[0xd6], "salc");
+    test_display(&[0x8e, 0x00], "mov es, [rax]");
+    // cs is not an allowed destination - would #ud on execution
+    test_display(&[0x8e, 0x08], "mov cs, [rax]");
+    test_display(&[0x8e, 0x10], "mov ss, [rax]");
+    test_display(&[0x8e, 0x18], "mov ds, [rax]");
+    test_display(&[0x8e, 0x20], "mov fs, [rax]");
+    test_display(&[0x8e, 0x28], "mov gs, [rax]");
+    test_invalid(&[0x8e, 0x30]);
+    test_invalid(&[0x8e, 0x38]);
 }
 
 #[test]
diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index 8749935..185e98d 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -948,6 +948,16 @@ fn test_mov() {
     test_display(&[0x0f, 0x97, 0xc8], "seta al");
     test_display(&[0x0f, 0x97, 0x00], "seta [eax]");
     test_display(&[0x0f, 0x97, 0x08], "seta [eax]");
+    test_display(&[0xd6], "salc");
+    test_display(&[0x8e, 0x00], "mov es, [eax]");
+    // cs is not an allowed destination - would #ud on execution
+    test_display(&[0x8e, 0x08], "mov cs, [eax]");
+    test_display(&[0x8e, 0x10], "mov ss, [eax]");
+    test_display(&[0x8e, 0x18], "mov ds, [eax]");
+    test_display(&[0x8e, 0x20], "mov fs, [eax]");
+    test_display(&[0x8e, 0x28], "mov gs, [eax]");
+    test_invalid(&[0x8e, 0x30]);
+    test_invalid(&[0x8e, 0x38]);
 }
 
 #[test]