and some prefix helpers should be pub

4 files changed, 37 insertions, 6 deletions

diff --git a/CHANGELOG b/CHANGELOG
index 1059267..580413e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -52,6 +52,13 @@
     size. an operand-size prefix now correctly overrides to pusha/popa.
 * 16-bit: an operand-size prefix now correctly overrides to pushad/popad.
   - likewise, thank you Stephen for spotting these issues!
+* Prefixes::operand_size and Prefixes::address_size are now public, reporting
+  if a 66 or 67 prefix is active for the decoded instruction. be aware that in
+  64-bit mode operand-size overrides interact in subtle ways with REX
+  prefixes and in particular REX.W takes precedence over operand-size in
+  practice.. most of the time. these are intended to be informative; if
+  application logic depends on them it is likely a yaxpeax-x86 bug.
+* Prefixes::segment is now public and reports the instruction's selected data segment.
 
 ## 2.0.0
 
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index f2fac5b..bfe67c3 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -3498,8 +3498,12 @@ impl Prefixes {
     fn set_repnz(&mut self) { self.bits = (self.bits & 0xcf) | 0x30 }
     #[inline]
     pub fn rep_any(&self) -> bool { self.bits & 0x30 != 0x00 }
+    /// return `true` if an operand-size (`66`) prefix is active for the instruction.
+    ///
+    /// this interacts in subtle ways with a REX prefix, if both are present. if you are tempted to
+    /// refine decode logic based the result of this function, please report that as an issue.
     #[inline]
-    fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
+    pub fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
     #[inline]
     fn set_operand_size(&mut self) {
         self.bits = self.bits | 0x1;
@@ -3508,14 +3512,18 @@ impl Prefixes {
     fn unset_operand_size(&mut self) {
         self.bits = self.bits & !0x1;
     }
+    /// return `true` if an operand-size (67) prefix is active for the instruction.
     #[inline]
-    fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
+    pub fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
     #[inline]
     fn set_address_size(&mut self) { self.bits = self.bits | 0x2 }
     #[inline]
     fn set_lock(&mut self) { self.bits |= 0x4 }
     #[inline]
     pub fn lock(&self) -> bool { self.bits & 0x4 == 4 }
+    /// return the instruction's selected data segment.
+    #[inline]
+    pub fn segment(&self) -> Segment { self.segment }
     #[inline]
     pub fn cs(&self) -> bool { self.segment == Segment::CS }
     #[inline]
diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs
index 5c895a7..17fd883 100644
--- a/src/protected_mode/mod.rs
+++ b/src/protected_mode/mod.rs
@@ -3440,20 +3440,28 @@ impl Prefixes {
     fn set_repnz(&mut self) { self.bits = (self.bits & 0xcf) | 0x30 }
     #[inline]
     pub fn rep_any(&self) -> bool { self.bits & 0x30 != 0x00 }
+    /// return `true` if an operand-size (`66`) prefix is active for the instruction.
+    ///
+    /// this interacts in subtle ways with a REX prefix, if both are present. if you are tempted to
+    /// refine decode logic based the result of this function, please report that as an issue.
     #[inline]
-    fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
+    pub fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
     #[inline]
     fn set_operand_size(&mut self) { self.bits = self.bits | 0x1 }
     #[inline]
     fn unset_operand_size(&mut self) { self.bits = self.bits & !0x1 }
+    /// return `true` if an operand-size (`67`) prefix is active for the instruction.
     #[inline]
-    fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
+    pub fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
     #[inline]
     fn set_address_size(&mut self) { self.bits = self.bits | 0x2 }
     #[inline]
     fn set_lock(&mut self) { self.bits |= 0x4 }
     #[inline]
     pub fn lock(&self) -> bool { self.bits & 0x4 == 4 }
+    /// return the instruction's selected data segment.
+    #[inline]
+    pub fn segment(&self) -> Segment { self.segment }
     #[inline]
     pub fn cs(&self) -> bool { self.segment == Segment::CS }
     #[inline]
diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs
index 8dd29b1..06b6c68 100644
--- a/src/real_mode/mod.rs
+++ b/src/real_mode/mod.rs
@@ -3467,20 +3467,28 @@ impl Prefixes {
     fn set_repnz(&mut self) { self.bits = (self.bits & 0xcf) | 0x30 }
     #[inline]
     pub fn rep_any(&self) -> bool { self.bits & 0x30 != 0x00 }
+    /// return `true` if an operand-size (`66`) prefix is active for the instruction.
+    ///
+    /// this interacts in subtle ways with a REX prefix, if both are present. if you are tempted to
+    /// refine decode logic based the result of this function, please report that as an issue.
     #[inline]
-    fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
+    pub fn operand_size(&self) -> bool { self.bits & 0x1 == 1 }
     #[inline]
     fn set_operand_size(&mut self) { self.bits = self.bits | 0x1 }
     #[inline]
     fn unset_operand_size(&mut self) { self.bits = self.bits & !0x1 }
+    /// return `true` if an operand-size (`67`) prefix is active for the instruction.
     #[inline]
-    fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
+    pub fn address_size(&self) -> bool { self.bits & 0x2 == 2 }
     #[inline]
     fn set_address_size(&mut self) { self.bits = self.bits | 0x2 }
     #[inline]
     fn set_lock(&mut self) { self.bits |= 0x4 }
     #[inline]
     pub fn lock(&self) -> bool { self.bits & 0x4 == 4 }
+    /// return the instruction's selected data segment.
+    #[inline]
+    pub fn segment(&self) -> Segment { self.segment }
     #[inline]
     pub fn cs(&self) -> bool { self.segment == Segment::CS }
     #[inline]