diff options
| author | iximeow <me@iximeow.net> | 2026-04-19 16:35:41 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-05-25 00:59:27 +0000 |
| commit | cabd41fd8c255a464c1436ac502a2317773a83b6 (patch) | |
| tree | 64423bc8a0ad1a8a5c1153143f5b1315cd344af1 | |
| parent | bbdb82bd41234021cc8dbe3337e88bd9f19cade9 (diff) | |
report memory access size for "monitor"
| -rw-r--r-- | CHANGELOG | 1 | ||||
| -rw-r--r-- | src/long_mode/mod.rs | 1 | ||||
| -rw-r--r-- | src/protected_mode/mod.rs | 1 | ||||
| -rw-r--r-- | src/real_mode/mod.rs | 1 |
4 files changed, 4 insertions, 0 deletions
@@ -20,6 +20,7 @@ is unchanged and uses a 16-bit form for source GPR. * reject 0f0d prefetch/nop with a register operand, which was incorrectly decoded before. * maskmovq and maskmovdqu now have their implicit memory access size reported correctly. +* monitor now reports a 1-byte memory access size. the monitored range in practice depends on CPUID. ## 2.0.0 diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 264e2d3..5123ff5 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -8288,6 +8288,7 @@ fn read_operands< match m { 0b000 => { instruction.opcode = Opcode::MONITOR; + instruction.mem_size = 1; } 0b001 => { instruction.opcode = Opcode::MWAIT; diff --git a/src/protected_mode/mod.rs b/src/protected_mode/mod.rs index 0cb6674..4581485 100644 --- a/src/protected_mode/mod.rs +++ b/src/protected_mode/mod.rs @@ -8083,6 +8083,7 @@ fn read_operands< match m { 0b000 => { instruction.opcode = Opcode::MONITOR; + instruction.mem_size = 1; } 0b001 => { instruction.opcode = Opcode::MWAIT; diff --git a/src/real_mode/mod.rs b/src/real_mode/mod.rs index 930d450..3fbb99a 100644 --- a/src/real_mode/mod.rs +++ b/src/real_mode/mod.rs @@ -8128,6 +8128,7 @@ fn read_operands< match m { 0b000 => { instruction.opcode = Opcode::MONITOR; + instruction.mem_size = 1; } 0b001 => { instruction.opcode = Opcode::MWAIT; |