diff options
| author | iximeow <me@iximeow.net> | 2023-12-16 13:26:48 -0800 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2023-12-16 13:26:48 -0800 |
| commit | 110f797005cca70e18cbcc0975397d26d8045245 (patch) | |
| tree | a3ff79c0c3a7519d00e19d213447c268614cef00 /fuzz/Cargo.toml | |
| parent | 85668b222582ef1edae537beea452d5e1c933389 (diff) | |
fix opportunity for unhandled register synonyms
registers `al`, `cl`, `dl`, and `bl` could have two different
representations - with `rex.w` and without. these two forms of `RegSpec`
would not compare equal, nor has the same, so for code relying on
`RegSpec` to faithfully represent a 1-1 mapping to x86 registers, these
synonyms would introduce bugs in register analysis.
for example, in `yaxpeax-core`, this would result in instructions
writing to `rex.w al` not being visible as definitions for a future
read of `!rex.w al`.
fix this in `x86_64` code, add new test cases about the confusion,
adjust register names to make this situation more clearly a bug, and
introduce two new fuzz targets that would have helped spot this error.
Diffstat (limited to 'fuzz/Cargo.toml')
| -rw-r--r-- | fuzz/Cargo.toml | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/fuzz/Cargo.toml b/fuzz/Cargo.toml index 53bcb81..60690f6 100644 --- a/fuzz/Cargo.toml +++ b/fuzz/Cargo.toml @@ -32,3 +32,15 @@ name = "display_c_does_not_panic" path = "fuzz_targets/display_c_does_not_panic.rs" test = false doc = false + +[[bin]] +name = "does_not_decode_invalid_registers" +path = "fuzz_targets/does_not_decode_invalid_registers.rs" +test = false +doc = false + +[[bin]] +name = "small_reg_is_always_old_bank_if_possible" +path = "fuzz_targets/small_reg_is_always_old_bank_if_possible.rs" +test = false +doc = false |