diff options
| author | iximeow <me@iximeow.net> | 2026-06-05 08:35:17 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-06-21 16:44:21 +0000 |
| commit | d8d1662bc0469901a25658679e07082aa4d71d22 (patch) | |
| tree | 6f7cd55156a56efc3f623f69b01061db2e3ecf05 /src/long_mode/mod.rs | |
| parent | e38dbea8cb456758c50f3593287acdca3983889e (diff) | |
64-bit: vex-prefix register extension..
Diffstat (limited to 'src/long_mode/mod.rs')
| -rw-r--r-- | src/long_mode/mod.rs | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 548aec3..9f04198 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -8745,7 +8745,7 @@ fn read_operands< } else { RegisterBank::D }; - instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth); + instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth); instruction.operands[0] = OperandSpec::RegMMM; instruction.operand_count = 1; } @@ -8756,7 +8756,7 @@ fn read_operands< } else { RegisterBank::D }; - instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth); + instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth); instruction.operands[0] = OperandSpec::RegMMM; instruction.operand_count = 1; @@ -8768,7 +8768,7 @@ fn read_operands< } else { RegisterBank::D }; - instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth); + instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth); instruction.operands[0] = OperandSpec::RegMMM; instruction.operand_count = 1; } @@ -8779,7 +8779,7 @@ fn read_operands< } else { RegisterBank::D }; - instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth); + instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth); instruction.operands[0] = OperandSpec::RegMMM; instruction.operand_count = 1; } @@ -8790,7 +8790,8 @@ fn read_operands< } else { RegisterBank::D }; - instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().x(), opwidth); + // incssp register is extended by rex.b???? + instruction.regs[1] = RegSpec::from_parts(m, instruction.prefixes.rex_unchecked().b(), opwidth); instruction.operands[0] = OperandSpec::RegMMM; instruction.operand_count = 1; } |