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authoriximeow <me@iximeow.net>2026-03-09 16:36:00 +0000
committeriximeow <me@iximeow.net>2026-05-25 00:59:27 +0000
commit8a2dd6bcf37a3ebb43e2153a306cf0250637c116 (patch)
tree44530b543f6718a6c709abf7c35f431f053beea8 /src/long_mode/mod.rs
parent63582532b8014d59117a8929afd1f7725bc1b469 (diff)
pushf, popf, enter, leave, xlat all have implicit memory access
also add "is_masked" to operand spec
Diffstat (limited to 'src/long_mode/mod.rs')
-rw-r--r--src/long_mode/mod.rs14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs
index 0ffc9f5..f3b4dc0 100644
--- a/src/long_mode/mod.rs
+++ b/src/long_mode/mod.rs
@@ -474,6 +474,9 @@ impl OperandSpec {
fn is_memory(&self) -> bool {
(*self as u8) & 0x80 != 0
}
+ fn is_masked(&self) -> bool {
+ (*self as u8) & 0x40 != 0
+ }
}
/// an `avx512` merging mode.
@@ -6619,8 +6622,15 @@ fn read_operands<
instruction.mem_size = 8;
} else if instruction.opcode == Opcode::RETF {
instruction.mem_size = 10;
+ } else if instruction.opcode == Opcode::POPF {
+ instruction.mem_size = 8;
+ } else if instruction.opcode == Opcode::PUSHF {
+ instruction.mem_size = 8;
+ } else if instruction.opcode == Opcode::LEAVE {
+ instruction.mem_size = 8;
+ } else if instruction.opcode == Opcode::XLAT {
+ instruction.mem_size = 1;
}
- // TODO: leave?
instruction.operands[0] = OperandSpec::Nothing;
instruction.operand_count = 0;
return Ok(());
@@ -7102,6 +7112,8 @@ fn read_operands<
instruction.imm = read_num(words, 1)? as u64;
instruction.operands[0] = OperandSpec::ImmInDispField;
instruction.operands[1] = OperandSpec::ImmU8;
+ // because there is an implied push of the adjusted base pointer
+ instruction.mem_size = 8;
instruction.operand_count = 2;
}
OperandCase::Fw => {