diff options
| author | iximeow <me@iximeow.net> | 2020-07-26 04:20:35 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2020-07-26 04:20:35 -0700 |
| commit | f6c153d4cf511d05d8f1df21190b73d62c2412bb (patch) | |
| tree | b2584dd3a9c1d3aa9895a0a04b8d0e4787929554 /src | |
| parent | c54b230323e49222d188b409a1efa9dc99c62ec6 (diff) | |
bitwise ops, test cases, btr
Diffstat (limited to 'src')
| -rw-r--r-- | src/long_mode/mod.rs | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/long_mode/mod.rs b/src/long_mode/mod.rs index 1b80b11..fe490e8 100644 --- a/src/long_mode/mod.rs +++ b/src/long_mode/mod.rs @@ -5492,12 +5492,16 @@ fn read_operands<T: Iterator<Item=u8>>(decoder: &InstDecoder, mut bytes_iter: T, op @ OperandCode::ModRM_0xc1_Ev_Ib | op @ OperandCode::ModRM_0xd0_Eb_1 | op @ OperandCode::ModRM_0xd1_Ev_1 | + op @ OperandCode::ModRM_0xd2_Eb_CL | op @ OperandCode::ModRM_0xd3_Ev_CL => { instruction.operands[0] = mem_oper; instruction.opcode = BITWISE_OPCODE_MAP[((modrm >> 3) & 7) as usize].clone(); if let OperandCode::ModRM_0xd3_Ev_CL = op { instruction.modrm_rrr = RegSpec::cl(); instruction.operands[1] = OperandSpec::RegRRR; + } else if let OperandCode::ModRM_0xd2_Eb_CL = op { + instruction.modrm_rrr = RegSpec::cl(); + instruction.operands[1] = OperandSpec::RegRRR; } else { let num = match op { OperandCode::ModRM_0xc0_Eb_Ib | |