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authoriximeow <me@iximeow.net>2020-05-03 13:54:02 -0700
committeriximeow <me@iximeow.net>2020-05-03 13:54:02 -0700
commit876fc7449cf862e7ffe788885fb7d4209ad2eb5d (patch)
treeab66916f6bfae21dab417372fcf9b3ae7fce547f /test
parentc9df7910c914d04644aee660d48de1245467f384 (diff)
add width() to ask width of an x86 operand
this is largely wrong for memory operands, which require more invasive changes
Diffstat (limited to 'test')
-rw-r--r--test/long_mode/mod.rs1
-rw-r--r--test/long_mode/operand.rs17
-rw-r--r--test/protected_mode/mod.rs1
-rw-r--r--test/protected_mode/operand.rs16
4 files changed, 35 insertions, 0 deletions
diff --git a/test/long_mode/mod.rs b/test/long_mode/mod.rs
index addaae4..2fbe4fb 100644
--- a/test/long_mode/mod.rs
+++ b/test/long_mode/mod.rs
@@ -1,4 +1,5 @@
mod regspec;
+mod operand;
use std::fmt::Write;
diff --git a/test/long_mode/operand.rs b/test/long_mode/operand.rs
new file mode 100644
index 0000000..885c6d1
--- /dev/null
+++ b/test/long_mode/operand.rs
@@ -0,0 +1,17 @@
+use yaxpeax_arch::{Decoder, LengthedInstruction};
+use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode};
+
+#[test]
+fn register_widths() {
+ assert_eq!(Operand::Register(RegSpec::rsp()).width(), 8);
+ assert_eq!(Operand::Register(RegSpec::esp()).width(), 4);
+ assert_eq!(Operand::Register(RegSpec::sp()).width(), 2);
+ assert_eq!(Operand::Register(RegSpec::cl()).width(), 1);
+ assert_eq!(Operand::Register(RegSpec::ch()).width(), 1);
+ assert_eq!(Operand::Register(RegSpec::gs()).width(), 2);
+}
+
+#[test]
+fn memory_widths() {
+ assert_eq!(Operand::RegDeref(RegSpec::rsp()).width(), 8);
+}
diff --git a/test/protected_mode/mod.rs b/test/protected_mode/mod.rs
index 37a3b24..ab3cdc8 100644
--- a/test/protected_mode/mod.rs
+++ b/test/protected_mode/mod.rs
@@ -1,4 +1,5 @@
mod regspec;
+mod operand;
use std::fmt::Write;
diff --git a/test/protected_mode/operand.rs b/test/protected_mode/operand.rs
new file mode 100644
index 0000000..08a24be
--- /dev/null
+++ b/test/protected_mode/operand.rs
@@ -0,0 +1,16 @@
+use yaxpeax_arch::{Decoder, LengthedInstruction};
+use yaxpeax_x86::long_mode::{DecodeError, InstDecoder, Opcode};
+
+#[test]
+fn register_widths() {
+ assert_eq!(Operand::Register(RegSpec::esp()).width(), 4);
+ assert_eq!(Operand::Register(RegSpec::sp()).width(), 2);
+ assert_eq!(Operand::Register(RegSpec::cl()).width(), 1);
+ assert_eq!(Operand::Register(RegSpec::ch()).width(), 1);
+ assert_eq!(Operand::Register(RegSpec::gs()).width(), 2);
+}
+
+#[test]
+fn memory_widths() {
+ assert_eq!(Operand::RegDeref(RegSpec::rsp()).width(), 4);
+}