| Age | Commit message (Expand) | Author |
|---|
| 9 hours | gpr register size in real/protected mode | iximeow |
| 10 hours | disallow 66-prefixed sha1rnds4 | iximeow |
| 10 hours | pusha/popa/push-imm memory sizes | iximeow |
| 10 hours | helpers to create cr0-cr7 | iximeow |
| 10 hours | working through a bunch of avx512 stuff, regspec constructors are const | iximeow |
| 10 hours | pextr*/extractps | iximeow |
| 10 hours | more precision for vinsert/vextract/vblendv{ps,pd} | iximeow |
| 10 hours | actually support avx/f16c in per-uarch decoding | iximeow |
| 10 hours | vmaskmovdqu, vmovq were also incorrect in some ways... | iximeow |
| 11 hours | more general avx improvements | iximeow |
| 11 hours | cleanup pass on vex-encoded instructions is going to be exciting | iximeow |
| 11 hours | report memory access size for "monitor" | iximeow |
| 11 hours | maskmov{q,dqu} memory access size | iximeow |
| 11 hours | more precise about 0f0d prefetch/nop | iximeow |
| 11 hours | fix table management instructions' ({l,s}{g,i,l}dt) mem_size | iximeow |
| 11 hours | push/pop for segment registers has implicit memory access | iximeow |
| 11 hours | pushf, popf, enter, leave, xlat all have implicit memory access | iximeow |
| 11 hours | add initial stats for disasm stats in all modes | iximeow |
| 2026-02-14 | fair enough on those warnings | iximeow |
| 2026-02-14 | type aliases make some of these signatures less egregious.. | iximeow |
| 2025-06-01 | 3dnow was still supported on K8, K10. 32-bit mode should learn about uarch tw... | iximeow |
| 2025-06-01 | describe the per-isa extensions a bit better | iximeow |
| 2025-06-01 | revise_instruction is the same on all bitnesses, so macro it too | iximeow |
| 2025-06-01 | DecodeEverything wasn't useful, no better than InstDecoder::default()?? | iximeow |
| 2025-06-01 | cpu feature bits are the same across 64/32/16-bit | iximeow |
| 2025-06-01 | expand isa feature selection to more bits | iximeow |
| 2024-06-24 | document one more stray unsafe | iximeow |
| 2024-06-24 | justify the current max instruction length | iximeow |
| 2024-06-24 | consistently enter register/number/opcode spans | iximeow |
| 2024-06-24 | rename most operand variants, make them structy rather than tupley | iximeow |
| 2024-06-23 | remove selects_cs(), cs() now does the right thing | iximeow |
| 2024-06-23 | fix several sources of dead code warnings in various crate configs | iximeow |
| 2024-06-23 | remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-arch | iximeow |
| 2024-06-23 | cfg_attr wants feature, not features plural | iximeow |
| 2024-06-23 | last vestiges of initial perf experiments | iximeow |
| 2024-06-23 | another fuzz bug | iximeow |
| 2024-06-23 | fuzz caught negation bug | iximeow |
| 2024-06-23 | InstructionTextBuffer for all three modes, adjust fuzzer to match | iximeow |
| 2024-06-23 | add additional `call` test cases | iximeow |
| 2024-06-23 | forward long deprecation allowances as appropriate | iximeow |
| 2024-06-23 | adapt protected-mode display to real mode | iximeow |
| 2024-06-23 | normalize imports, pull safer_unchecked from yaxpeax-arch | iximeow |
| 2024-06-23 | adapt OperandVisitor and related to real_mode | iximeow |
| 2024-06-23 | fix AbsoluteFarAddress being tagged as a memory operand | iximeow |
| 2024-06-23 | actually use new can_lock in 32b and 16b modes | iximeow |
| 2024-06-23 | actually use new can_rep in 32b and 16b modes | iximeow |
| 2024-06-23 | port opcode helpers and reordering to 32-bit and 16-bit decoders | iximeow |
| 2024-06-23 | add more conditional inlining for 32-bit and 16-bit decoders | iximeow |
| 2024-04-02 | display opt: mem size labels and minor segment reporting changes | iximeow |
| 2023-12-16 | fix hreset being disassembled as having second operand of "Nothing" | iximeow |
