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authorrva3 <rva333@protonmail.com>2026-02-19 20:10:49 +0200
committeriximeow <me@iximeow.net>2026-02-22 03:05:52 +0000
commit76449b9a2715a6403a84b1a5b48de55d331c9b14 (patch)
treeaf488dded8427802bb85ff8dfd239900b576d4fe
parent5803a74b89cfc986f26b01f607bcfedd7bcbcf68 (diff)
derive Clone and Copy for armv7 instruction
-rw-r--r--CHANGELOG5
-rw-r--r--src/armv7.rs2
2 files changed, 6 insertions, 1 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 3aede47..5f8a3c5 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,8 @@
+## 0.5.0
+
+* ARMv7 instructions now impl Copy and Clone, matching A64 instructions and so
+ many enums/structures from decoded instructions.
+
## 0.4.0
* ARMv7 and A64 `Opcode` and `Operand` are now `#[non_exhaustive]`.
diff --git a/src/armv7.rs b/src/armv7.rs
index 3e289b6..1a0a7d5 100644
--- a/src/armv7.rs
+++ b/src/armv7.rs
@@ -770,7 +770,7 @@ pub enum Bank {
}
/// a `armv7` or below instruction.
-#[derive(Debug, PartialEq, Eq)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub struct Instruction {
/// the condition code for this instruction, defaults to `AL` if the instruction is
/// unconditional.