lsl/mov aliasing

2 files changed, 30 insertions, 0 deletions

diff --git a/src/armv7/display.rs b/src/armv7/display.rs
index ee1d086..6f6fba1 100644
--- a/src/armv7/display.rs
+++ b/src/armv7/display.rs
@@ -548,6 +548,26 @@ pub(crate) fn visit_inst<T: DisplaySink>(instr: &Instruction, out: &mut T) -> fm
 
             return Ok(());
         }
+        Opcode::LSL => {
+            if instr.operands[2] == Operand::Imm12(0) {
+                out.span_start_opcode();
+                out.write_str("mov")?;
+                if instr.s() {
+                    out.write_char('s')?;
+                }
+                out.span_end_opcode();
+
+                out.write_str(" ")?;
+
+                let mut op_visitor = DisplayingOperandVisitor {
+                    f: out
+                };
+                instr.operands[0].visit(&mut op_visitor)?;
+                op_visitor.f.write_str(", ")?;
+                instr.operands[1].visit(&mut op_visitor)?;
+                return Ok(());
+            }
+        }
         Opcode::MRC(coproc, opc1, opc2, _) |
         Opcode::MCR(coproc, opc1, opc2, _) |
         Opcode::CDP(coproc, opc1, opc2, _) => {
diff --git a/tests/armv7/thumb.rs b/tests/armv7/thumb.rs
index 6384af7..998b9e5 100644
--- a/tests/armv7/thumb.rs
+++ b/tests/armv7/thumb.rs
@@ -2681,6 +2681,16 @@ fn test_decode_mov_cases() {
         &[0xff, 0x46],
         "mov pc, pc"
     );
+
+    // lsl r0, r0, 0x0: "if imm5 == '00000' then SEE MOV (register);
+    test_display(
+        &[0x00, 0x00],
+        "movs r0, r0"
+    );
+    test_display(
+        &[0x11, 0x00],
+        "movs r1, r2"
+    );
 }
 #[test]
 fn test_decode_op_s_cases() {