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| author | iximeow <me@iximeow.net> | 2026-09-11 15:57:22 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-09-11 16:18:53 +0000 |
| commit | a00a54539d9124d8b376ee9cbeab355d99c9d163 (patch) | |
| tree | 85ee14db687c5590c2bbea8eed1589f4088f969c /CHANGELOG | |
| parent | 7e70f851a481d36669e64edcd61ce7df9d578468 (diff) | |
fix {s,u}xt{h,b}[16] using an immediate to describe their rotates
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -25,6 +25,8 @@ * thumb2: support ARMv8 hints PACBTI, BTI, ESB, PAC, and AUT * thumb2: fix `mrc`, `mrc2` use of register number "15", which means apsr_nzcv, rather than pc +* thumb2: several instructions which decode an explicit rotate operand now do so + into a distinct Operand::Ror (sxth, uxth, stxb16, utxb16, sxtb, uxtb) * ARMv8: support thumb2 encoding of `Test Target` instruction, `Opcode::TT` (formatted as any of `tt`, `ttt`, `tta`, `ttat`) * ARMv8: formerly-coprocessor instructions have been defined into SIMD extensions, |