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authorBrandon Ros <brandonros1@gmail.com>2026-07-03 00:14:45 -0400
committeriximeow <me@iximeow.net>2026-07-28 02:53:24 +0000
commit9e9c7b2663fa52881bf6883e74f4cd8610c38570 (patch)
tree9646b1250f2f2bea921a582192932eda40ed3ab0 /README.md
parenteea7a08447871114c86ad3c42945847336960d2c (diff)
fix more thumb2 register data-processing decode bugs
- register-controlled shifts (lsl/lsr/asr/ror by register) all decoded as lsl: the shift type was read from hw1[6:5] (always 0 for this form) instead of hw0[6:5] - 32-bit uxt*/sxt* extends read the ror amount from the wrong field (hw1[2:1] scaled by 4 instead of hw1[5:4] scaled by 8), so a no-rotation extend came back as ror #4; rotation of 0 is now omitted - sxtab was decoded as sxtah (wrong opcode table entry) all cases verified against binutils objdump
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