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| author | iximeow <me@iximeow.net> | 2026-07-28 02:53:04 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-07-28 07:28:15 +0000 |
| commit | 1c03f9be10d03c63d9c6eed1e56333763fee628d (patch) | |
| tree | 59ddcdce9e6d52c0aaf80465f637363569050890 /src/armv7.rs | |
| parent | 5581435b4edc8836e172a5088d74d2ec97b2bc99 (diff) | |
temp, armv8-thumb
Diffstat (limited to 'src/armv7.rs')
| -rw-r--r-- | src/armv7.rs | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/armv7.rs b/src/armv7.rs index fd850ae..54bb998 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -259,6 +259,24 @@ pub enum Opcode { UDIV, SMLALD(bool), SMLSLD(bool), + + // well.. this is kind of awkward.. this module really is *a32* (and t32). armv8 adds new + // instructions to both modes. nothing below is "armv7" even though that's the module name. + // this all needs new names. sorry! + STLB, + STLH, + STL, + STLEXB, + STLEXH, + STLEX, + STLEXD, + LDAB, + LDAH, + LDA, + LDAEXB, + LDAEXH, + LDAEX, + LDAEXD, } static DATA_PROCESSING_OPCODES: [Opcode; 16] = [ |