diff options
| author | rva3 <rva333@protonmail.com> | 2026-02-20 03:02:09 +0200 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-02-22 03:05:53 +0000 |
| commit | 5f91a83b861a0c67dde9a887db7e08dafd0a5b65 (patch) | |
| tree | 4cdd73399c9f6d2aaa7f148ed3bd35414e79be58 /src/armv7.rs | |
| parent | 76449b9a2715a6403a84b1a5b48de55d331c9b14 (diff) | |
rename MCR2/MRC2 to MCR/MRC
they share exactly the same encoding, except the high bits for condition
the bool indicates if it's A2 encondings which is unconditional
Diffstat (limited to 'src/armv7.rs')
| -rw-r--r-- | src/armv7.rs | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/armv7.rs b/src/armv7.rs index 1a0a7d5..06dbecb 100644 --- a/src/armv7.rs +++ b/src/armv7.rs @@ -111,11 +111,19 @@ pub enum Opcode { STC2(u8), STC2L(u8), MCRR2(u8, u8), - MCR2(u8, u8, u8), + /// > MCR (Move to Coprocessor from ARM Register) + /// + /// fields here are `coproc`, `opcode_1`, `opcode_2`, and a bool indicating if the original + /// encoding was `MCR` or `MCR2` (`true` means `MCR2`). + MCR(u8, u8, u8, bool), MRRC2(u8, u8), MCRR(u8, u8), MRRC(u8, u8), - MRC2(u8, u8, u8), + /// > MRC (Move to ARM Register from Coprocessor) + /// + /// fields here are `coproc`, `opcode_1`, `opcode_2`, and a bool indicating if the original + /// encoding was `MRC` or `MRC2` (`true` means `MRC2`). + MRC(u8, u8, u8, bool), CDP2(u8, u8, u8), SRS(bool, bool), RFE(bool, bool), @@ -1461,9 +1469,9 @@ impl Decoder<ARMv7> for InstDecoder { // MCR2/MRC2, page A8-477/A8-493 let opc1 = (word >> 21) as u8 & 0b111; if (word >> 20) & 1 == 0 { - inst.opcode = Opcode::MCR2(coproc, opc1, opc2); + inst.opcode = Opcode::MCR(coproc, opc1, opc2, true); } else { - inst.opcode = Opcode::MRC2(coproc, opc1, opc2); + inst.opcode = Opcode::MRC(coproc, opc1, opc2, true); } inst.operands = [ Operand::Reg(Reg::from_u8(Rt)), |