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| author | iximeow <me@iximeow.net> | 2026-09-11 16:57:56 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-09-11 16:57:56 +0000 |
| commit | 9eebd279e4a523e009150786ca270f0e2330e0c3 (patch) | |
| tree | 6c8ff475a50518e0a165fbb750ea840b26b79ec0 /src/armv7/display.rs | |
| parent | 475321a686f346ac51cded60384a903fa8e9fdf8 (diff) | |
report rounding bit of smmla/smmls
Diffstat (limited to 'src/armv7/display.rs')
| -rw-r--r-- | src/armv7/display.rs | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/armv7/display.rs b/src/armv7/display.rs index 3f7162b..7b0be82 100644 --- a/src/armv7/display.rs +++ b/src/armv7/display.rs @@ -858,7 +858,9 @@ impl <T: fmt::Write, Y: YaxColors> Colorize<T, Y> for ConditionedOpcode { Opcode::UMLAL | Opcode::SMLSD | Opcode::SMMLA | + Opcode::SMMLAR | Opcode::SMMLS | + Opcode::SMMLSR | Opcode::USADA8 | Opcode::USAD8 | Opcode::SDIV | @@ -1185,7 +1187,9 @@ impl Opcode { Opcode::SMLSLD(false) => { "smlsldb" }, Opcode::SMLSD => { "smlsd" }, Opcode::SMMLA => { "smmla" }, + Opcode::SMMLAR => { "smmlar" }, Opcode::SMMLS => { "smmls" }, + Opcode::SMMLSR => { "smmlsr" }, Opcode::USADA8 => { "usada8" }, Opcode::USAD8 => { "usad8" }, Opcode::SMLAD => { "smlad" }, |