diff options
| author | iximeow <me@iximeow.net> | 2026-07-28 02:53:04 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-07-28 07:28:15 +0000 |
| commit | 1c03f9be10d03c63d9c6eed1e56333763fee628d (patch) | |
| tree | 59ddcdce9e6d52c0aaf80465f637363569050890 /src/armv7 | |
| parent | 5581435b4edc8836e172a5088d74d2ec97b2bc99 (diff) | |
temp, armv8-thumb
Diffstat (limited to 'src/armv7')
| -rw-r--r-- | src/armv7/display.rs | 28 | ||||
| -rw-r--r-- | src/armv7/thumb.rs | 72 |
2 files changed, 99 insertions, 1 deletions
diff --git a/src/armv7/display.rs b/src/armv7/display.rs index d2198de..6673fcd 100644 --- a/src/armv7/display.rs +++ b/src/armv7/display.rs @@ -905,6 +905,20 @@ impl <T: fmt::Write, Y: YaxColors> Colorize<T, Y> for ConditionedOpcode { Opcode::STRHT | Opcode::LDRBT | Opcode::STRBT | + Opcode::STLB | + Opcode::STLH | + Opcode::STL | + Opcode::STLEXB | + Opcode::STLEXH | + Opcode::STLEX | + Opcode::STLEXD | + Opcode::LDAB | + Opcode::LDAH | + Opcode::LDA | + Opcode::LDAEXB | + Opcode::LDAEXH | + Opcode::LDAEX | + Opcode::LDAEXD | Opcode::SWP | Opcode::SWPB | Opcode::MSR | @@ -1098,6 +1112,20 @@ impl Opcode { Opcode::STRHT => { "strht" }, Opcode::LDRBT => { "ldrbt" }, Opcode::STRBT => { "strbt" }, + Opcode::STLB => { "stlb" }, + Opcode::STLH => { "stlh" }, + Opcode::STL => { "stl" }, + Opcode::STLEXB => { "stlexb" }, + Opcode::STLEXH => { "stlexh" }, + Opcode::STLEX => { "stlex" }, + Opcode::STLEXD => { "stlexd" }, + Opcode::LDAB => { "ldab" }, + Opcode::LDAH => { "ldah" }, + Opcode::LDA => { "lda" }, + Opcode::LDAEXB => { "ldaexb" }, + Opcode::LDAEXH => { "ldaexh" }, + Opcode::LDAEX => { "ldaex" }, + Opcode::LDAEXD => { "ldaexd" }, Opcode::SWP => { "swp" }, Opcode::SWPB => { "swpb" }, Opcode::SDIV => { "sdiv" }, diff --git a/src/armv7/thumb.rs b/src/armv7/thumb.rs index 675b9f2..1e3ee28 100644 --- a/src/armv7/thumb.rs +++ b/src/armv7/thumb.rs @@ -323,6 +323,41 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d Operand::RegDeref(Reg::from_u8(rn)), ]; } + 0b1000 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLB; + } + 0b1001 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLH; + } + 0b1010 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STL; + } + 0b1100 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLEXB; + } + 0b1101 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLEXH; + } + 0b1110 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLEX; + } + 0b1111 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::STLEXD; + } _ => { return Err(DecodeError::Undefined); } @@ -408,7 +443,7 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d Operand::Nothing, ]; } - 0b0110 => { + 0b0111 => { // `LDREXD` if rt == 13 || rt == 15 || rt2 == 13 || rt2 == 15 || rn == 15 { decoder.unpredictable()?; @@ -423,6 +458,41 @@ pub fn decode_into<T: Reader<<ARMv7 as Arch>::Address, <ARMv7 as Arch>::Word>>(d Operand::Nothing, ]; } + 0b1000 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAB; + } + 0b1001 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAH; + } + 0b1010 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDA; + } + 0b1100 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAEXB; + } + 0b1101 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAEXH; + } + 0b1110 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAEX; + } + 0b1111 => { + // TODO ARMv8 + // TODO: v8 ops + inst.opcode = Opcode::LDAEXD; + } _ => { return Err(DecodeError::Undefined); } |