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| author | Grond <grond@grondhaus.net> | 2026-06-22 13:03:32 -0700 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-07-28 02:53:24 +0000 |
| commit | 03b7860359a9bdff793419367563974db335e45e (patch) | |
| tree | e93fb929d8adec23a70d3548e9a1bfcd82269659 /tests/armv7/mod.rs | |
| parent | 44f91bf710081d98b465252487a6b168b2f2597e (diff) | |
Check all of the appropriate bits when parsing op1 for CDP2/MCR2/MRC2
Diffstat (limited to 'tests/armv7/mod.rs')
| -rw-r--r-- | tests/armv7/mod.rs | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/tests/armv7/mod.rs b/tests/armv7/mod.rs index 632bd3e..7fff4a8 100644 --- a/tests/armv7/mod.rs +++ b/tests/armv7/mod.rs @@ -714,6 +714,14 @@ fn test_register_shift_rotate() { test_all([0x62, 0x00, 0x01, 0xe0], "and r0, r1, r2, rrx"); } +#[test] +fn test_decode_mrc2() { + // The LSB of the last byte being set makes op1 not match any row in + // A5.7 Unconditional Instructions, but previously this was incorrectly decoded as `mrc2`. + test_invalid([0xbc, 0xec, 0xff, 0xff]); + test_armv6([0xbc, 0xec, 0xff, 0xfe], "mrc2 p12, 7, lr, c15, c12, 5"); +} + static INSTRUCTION_BYTES: [u8; 4 * 60] = [ 0x24, 0xc0, 0x9f, 0xe5, 0x00, 0xb0, 0xa0, 0xe3, |