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authorGrond <grond@grondhaus.net>2026-06-24 18:58:33 -0700
committeriximeow <me@iximeow.net>2026-07-28 02:53:24 +0000
commit485aaac0f82e6b5546ae392b6be626c4558cc26a (patch)
tree24f0717953d8b8db7c892d88727f5b60c9ce5a02 /tests/armv7/mod.rs
parent88db0bb355e14ba58658026df7708e62696978b2 (diff)
Decode the correct number of operands for TST/TEQ (immediate/register)
Diffstat (limited to 'tests/armv7/mod.rs')
-rw-r--r--tests/armv7/mod.rs16
1 files changed, 16 insertions, 0 deletions
diff --git a/tests/armv7/mod.rs b/tests/armv7/mod.rs
index 78d725b..310b3f7 100644
--- a/tests/armv7/mod.rs
+++ b/tests/armv7/mod.rs
@@ -746,6 +746,22 @@ fn test_cmp_register_decode() {
test_all([0x11, 0x03, 0x72, 0xe1], "cmns r2, r1, lsl r3");
}
+#[test]
+fn test_tst_immediate_decode() {
+ test_all([0xe6, 0x00, 0x18, 0xe3], "tsts r8, 0xe6");
+ test_all([0xe6, 0x00, 0x38, 0xe3], "teqs r8, 0xe6");
+}
+
+#[test]
+fn test_tst_register_decode() {
+ test_all([0x01, 0x00, 0x12, 0xe1], "tsts r2, r1");
+ test_all([0x01, 0x03, 0x12, 0xe1], "tsts r2, r1, lsl 6");
+ test_all([0x11, 0x03, 0x12, 0xe1], "tsts r2, r1, lsl r3");
+ test_all([0x01, 0x00, 0x32, 0xe1], "teqs r2, r1");
+ test_all([0x01, 0x03, 0x32, 0xe1], "teqs r2, r1, lsl 6");
+ test_all([0x11, 0x03, 0x32, 0xe1], "teqs r2, r1, lsl r3");
+}
+
static INSTRUCTION_BYTES: [u8; 4 * 60] = [
0x24, 0xc0, 0x9f, 0xe5,
0x00, 0xb0, 0xa0, 0xe3,