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-rw-r--r--CHANGELOG2
-rw-r--r--src/armv7/display.rs6
-rw-r--r--tests/armv7/thumb.rs6
3 files changed, 10 insertions, 4 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 83594e7..b0265a1 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -10,6 +10,8 @@
* thumb2: use correct opcode table for parallel addition/subtractions
* the decoder reused the non-thumb encoding table, but thumb opcode/sizes are
encoded in a different order.
+* thumb2: write condition code *before* .w suffix
+ * this fixes nonsense "opcodes" like "b.weq", which should have been "beq.w"
* thumb2: `ldrexd` was off by one in looking up an opcode
* thumb2: pkhtb/pkhbt distinction was off by one bit
* thumb2: `mrs` destinations, which should have been a mask of the current (or
diff --git a/src/armv7/display.rs b/src/armv7/display.rs
index 36be517..4ed7b64 100644
--- a/src/armv7/display.rs
+++ b/src/armv7/display.rs
@@ -68,15 +68,15 @@ impl Instruction {
f.write_char('s')?;
}
}
- if self.w() {
- f.write_fixed_size(".w")?;
- }
if self.condition != ConditionCode::AL {
let name = self.condition.name();
// all condition codes are two characters long
f.write_char(name[0] as char)?;
f.write_char(name[1] as char)?;
}
+ if self.w() {
+ f.write_fixed_size(".w")?;
+ }
Ok(())
}
}
diff --git a/tests/armv7/thumb.rs b/tests/armv7/thumb.rs
index bd1a8a2..c3935c1 100644
--- a/tests/armv7/thumb.rs
+++ b/tests/armv7/thumb.rs
@@ -781,7 +781,7 @@ fn test_decode_32b_branch_cases() {
);
test_display(
&[0x3f, 0xf4, 0xfe, 0xaf],
- "b.weq $-0x4"
+ "beq.w $-0x4"
);
// Test for yaxpeax-arm #3
// branch target was 0x12198 in initial test case at offset 0x82fc
@@ -790,6 +790,10 @@ fn test_decode_32b_branch_cases() {
&[0x09, 0xf0, 0x4c, 0xbf],
"b.w $+0x9e98"
);
+ test_display(
+ &[0x5c, 0xf1, 0x80, 0xae],
+ "bpl.w $+0xdcd00"
+ )
}
#[test]
fn test_decode_bkpt_cases() {