diff options
Diffstat (limited to 'src/armv8/a64.rs')
| -rw-r--r-- | src/armv8/a64.rs | 360 |
1 files changed, 314 insertions, 46 deletions
diff --git a/src/armv8/a64.rs b/src/armv8/a64.rs index f60b87a..9961b98 100644 --- a/src/armv8/a64.rs +++ b/src/armv8/a64.rs @@ -138,6 +138,7 @@ mod docs { Ok((wmask, tmask)) } + #[inline(always)] pub fn DecodeShift(op: u8) -> super::ShiftStyle { assert!(op <= 0b11); [ @@ -1146,6 +1147,7 @@ impl SysOps { #[derive(Copy, Clone, Debug, PartialEq)] #[repr(u16)] #[allow(missing_docs)] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Opcode { Invalid, UDF, @@ -1261,6 +1263,7 @@ pub enum Opcode { DSB(u8), DMB(u8), SB, + #[deprecated(since = "0.4.0", note = "i spelled `ssbb` incorrectly.")] SSSB, HINT, CLREX, @@ -1735,6 +1738,50 @@ pub enum Opcode { IRG, SUBP, SUBPS, + + // one would imagine these to be sorted higher, maybe grouped + // with `Bcc` and ill-named `sssb`? unfortunately i made this + // `repr(u16)` long ago and you can't set a discriminant on + // non-unit enum variants, so moving this up just makes + // everything a mess. + BCcc(u8), + PSSBB, + SSBB, + + // instructions present with FEAT_PAuth + PACIASP, + PACIAZ, + PACIA1716, + PACIA171615, + PACIASPPC, + PACNBIASPPC, + PACIBSP, + PACIBZ, + PACIB1716, + PACIB171615, + PACIBSPPC, + PACNBIBSPPC, + + AUTIASP, + AUTIAZ, + AUTIA1716, + AUTIA171615, + AUTIASPPC, + AUTIASPPCR, + AUTIBSP, + AUTIBZ, + AUTIB1716, + AUTIB171615, + AUTIBSPPC, + AUTIBSPPCR, + + XPACLRI, + PACM, + + RETAASPPC, + RETABSPPC, + RETAASPPCR, + RETABSPPCR, } impl Display for Opcode { @@ -1830,6 +1877,10 @@ impl Display for Opcode { Opcode::MRS => "mrs", Opcode::ISB => "isb", Opcode::SB => "sb", + Opcode::SSBB => "ssbb", + Opcode::PSSBB => "pssbb", + // this arm should never, never, never be hit + #[allow(deprecated)] Opcode::SSSB => "sssb", Opcode::CLREX => "clrex", Opcode::CSEL => "csel", @@ -2499,7 +2550,7 @@ impl Display for Opcode { Opcode::TBX => "tbx", Opcode::FCADD => "fcadd", Opcode::LDGM => "ldgm", - Opcode::LDG => "ldm", + Opcode::LDG => "ldg", Opcode::STGM => "stgm", Opcode::STZGM => "stzgm", Opcode::STG => "stg", @@ -2566,9 +2617,45 @@ impl Display for Opcode { Opcode::SUBP => "subp", Opcode::SUBPS => "subps", + Opcode::PACIASP => "paciasp", + Opcode::PACIAZ => "paciaz", + Opcode::PACIA1716 => "pacia1716", + Opcode::PACIA171615 => "pacia171615", + Opcode::PACIASPPC => "paciasppc", + Opcode::PACNBIASPPC => "pacnbiasppc", + Opcode::PACIBSP => "pacibsp", + Opcode::PACIBZ => "pacibz", + Opcode::PACIB1716 => "pacib1716", + Opcode::PACIB171615 => "pacib171615", + Opcode::PACIBSPPC => "pacibsppc", + Opcode::PACNBIBSPPC => "pacnbibsppc", + + Opcode::AUTIASP => "autiasp", + Opcode::AUTIAZ => "autiaz", + Opcode::AUTIA1716 => "autia1716", + Opcode::AUTIA171615 => "autia171615", + Opcode::AUTIASPPC => "autiasppc", + Opcode::AUTIASPPCR => "autiasppcr", + Opcode::AUTIBSP => "autibsp", + Opcode::AUTIBZ => "autibz", + Opcode::AUTIB1716 => "autib1716", + Opcode::AUTIB171615 => "autib171615", + Opcode::AUTIBSPPC => "autibsppc", + Opcode::AUTIBSPPCR => "autibsppcr", + + Opcode::XPACLRI => "xpaclri", + Opcode::PACM => "pacm", + Opcode::RETAASPPC => "retaasppc", + Opcode::RETABSPPC => "retabsppc", + Opcode::RETAASPPCR => "retaasppcr", + Opcode::RETABSPPCR => "retabsppcr", + Opcode::Bcc(cond) => { return write!(fmt, "b.{}", Operand::ConditionCode(cond)); }, + Opcode::BCcc(cond) => { + return write!(fmt, "bc.{}", Operand::ConditionCode(cond)); + }, Opcode::DMB(option) => { return match option { 0b0001 => write!(fmt, "dmb oshld"), @@ -2708,6 +2795,7 @@ impl Display for ShiftStyle { /// in practice; no `aarch64` instruction has multiple `Operand::PCOffset` entries, for example. #[derive(Copy, Clone, Debug, PartialEq)] #[repr(C)] +#[cfg_attr(feature = "non-exhaustive-enums", non_exhaustive)] pub enum Operand { /// "no operand". since an instruction's `operands` array is always four entries, this is used /// to fill space, if any, after recording an instruction's extant operands. @@ -3058,7 +3146,7 @@ impl Display for Operand { if *d as i64 as f64 == *d { write!(fmt, "#{:0.1}", d) } else { - write!(fmt, "#{:0.}", d) + write!(fmt, "#{:0}", d) } }, Operand::Imm16(i) => { @@ -7630,11 +7718,11 @@ impl Decoder<ARMv8> for InstDecoder { return Err(DecodeError::InvalidOpcode); } - if opcode >= 0b100000 { + if opcode >= 0b1000000 { return Err(DecodeError::InvalidOperand); } - let opc = &[ + static OPCODES: [Result<Opcode, DecodeError>; 64] = [ Ok(Opcode::PACIA), Ok(Opcode::PACIB), Ok(Opcode::PACDA), Ok(Opcode::PACDB), Ok(Opcode::AUTIA), Ok(Opcode::AUTIB), @@ -7651,21 +7739,58 @@ impl Decoder<ARMv8> for InstDecoder { Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), - ][opcode as usize]?; - inst.opcode = *opc; - inst.operands = [ - Operand::Register(SizeCode::X, Rd), - if opcode < 0b001000 { - Operand::RegisterOrSP(SizeCode::X, Rn) - } else { - if Rn != 0b11111 { - return Err(DecodeError::InvalidOpcode); - } - Operand::Nothing - }, - Operand::Nothing, - Operand::Nothing, + // 0b10_0000 + Ok(Opcode::PACNBIASPPC), Ok(Opcode::PACNBIBSPPC), + Ok(Opcode::PACIA171615), Ok(Opcode::PACIB171615), + Ok(Opcode::AUTIASPPCR), Ok(Opcode::AUTIBSPPCR), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Ok(Opcode::PACIASPPC), Ok(Opcode::PACIBSPPC), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Ok(Opcode::AUTIA171615), Ok(Opcode::AUTIB171615), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), + Err(DecodeError::InvalidOpcode), Err(DecodeError::InvalidOpcode), ]; + let opc = OPCODES[opcode as usize]?; + inst.opcode = opc; + if opcode & 0b111110 == 0b100100 { + if Rd != 0b11110 { + return Err(DecodeError::InvalidOpcode); + } + inst.operands = [ + Operand::RegisterOrSP(SizeCode::X, Rn), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } else { + inst.operands = [ + if opcode < 0b100000 { + Operand::Register(SizeCode::X, Rd) + } else { + if Rd != 0b11110 { + return Err(DecodeError::InvalidOpcode); + } + Operand::Nothing + }, + if opcode < 0b001000 { + Operand::RegisterOrSP(SizeCode::X, Rn) + } else { + if Rn != 0b11111 { + return Err(DecodeError::InvalidOpcode); + } + Operand::Nothing + }, + Operand::Nothing, + Operand::Nothing, + ]; + } } _ => { // Data-processing (1 source), op2 > 0b00001 is (currently @@ -8145,7 +8270,7 @@ impl Decoder<ARMv8> for InstDecoder { ]; }, 0b111 => { - // extract + // extract or data-processing (1 source immediate) // let Rd = word & 0x1f; // let Rn = (word >> 5) & 0x1f; let imms = (word >> 10) & 0x3f; @@ -8170,6 +8295,27 @@ impl Decoder<ARMv8> for InstDecoder { inst.opcode = Opcode::EXTR; SizeCode::X } + } else if sf_op21 == 0b111 { + // C4.1.93.1 Data-processing (1 source immediate) + let opc = No0; + if opc == 0b00 { + inst.opcode = Opcode::AUTIASPPC; + } else if opc == 0b01 { + inst.opcode = Opcode::AUTIBSPPC; + } else { + return Err(DecodeError::InvalidOpcode); + } + + let raw_imm16 = (word >> 5) & 0xffff; + let imm16 = -((0xffff - raw_imm16) as i64); + + inst.operands = [ + Operand::PCOffset(imm16 << 2), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + return Ok(()); } else { inst.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOpcode); @@ -8538,6 +8684,9 @@ impl Decoder<ARMv8> for InstDecoder { let Rt = ((word >> 0) & 0b11111) as u16; let simm = (((imm9 as i16) << 7) >> 7) as i32; + // tag granularity is 16 bytes, so tags are encoded with the low four + // (`LOG2_TAG_GRANULE `) zeroes shifted out for all tag instructions. + let simm = simm << 4; let opcode = &[ Opcode::STZGM, Opcode::STG, Opcode::STG, Opcode::STG, @@ -10206,7 +10355,12 @@ impl Decoder<ARMv8> for InstDecoder { let offset = (word as i32 & 0x00ff_ffe0) >> 3; let extended_offset = (offset << 11) >> 11; let cond = word & 0x0f; - inst.opcode = Opcode::Bcc(cond as u8); + if word & 0x10 == 0 { + inst.opcode = Opcode::Bcc(cond as u8); + } else { + // (FEAT_HBC) + inst.opcode = Opcode::BCcc(cond as u8); + } inst.operands = [ Operand::PCOffset(extended_offset as i64), Operand::Nothing, @@ -10214,9 +10368,43 @@ impl Decoder<ARMv8> for InstDecoder { Operand::Nothing ]; } - 0b01001 => { // conditional branch (imm) + 0b01001 => { + // Miscellaneous branch (immediate) (FEAT_PAuth_LR) // o1 -> unallocated, reserved - return Err(DecodeError::InvalidOpcode); + let opc = (word >> 21) & 0b111; + let raw_imm16 = (word >> 5) & 0xffff; + let imm16 = -((0xffff - raw_imm16) as i64); + let op2 = word & 0b11111; + + match opc { + 0b000 => { + if op2 != 0b11111 { + return Err(DecodeError::InvalidOperand); + } + inst.opcode = Opcode::RETAASPPC; + inst.operands = [ + Operand::PCOffset(imm16 << 2), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + 0b001 => { + if op2 != 0b11111 { + return Err(DecodeError::InvalidOperand); + } + inst.opcode = Opcode::RETABSPPC; + inst.operands = [ + Operand::PCOffset(imm16 << 2), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + _ => { + return Err(DecodeError::InvalidOpcode); + } + } } /* 0b01010 to 0b01111 seem all invalid? */ 0b10000 | @@ -10326,6 +10514,8 @@ impl Decoder<ARMv8> for InstDecoder { ]; }, 0b11001 => { // system + // somewhere in here: + // System instructions with register argument (C4.1.94) let remainder = word & 0xffffff; if remainder >= 0x400000 { return Err(DecodeError::InvalidOperand); @@ -10356,13 +10546,61 @@ impl Decoder<ARMv8> for InstDecoder { match CRn { 0b0010 => { - inst.opcode = Opcode::HINT; - inst.operands = [ - Operand::ControlReg(CRm as u16), - Operand::Immediate(op2), - Operand::Nothing, - Operand::Nothing, - ]; + let hint_num = (CRm << 3) | op2; + inst.operands = [Operand::Nothing; 4]; + match hint_num { + 0b0000_111 => { + inst.opcode = Opcode::XPACLRI; + } + 0b0001_000 => { + inst.opcode = Opcode::PACIA1716; + }, + 0b0001_010 => { + inst.opcode = Opcode::PACIB1716; + } + 0b0001_100 => { + inst.opcode = Opcode::AUTIA1716; + } + 0b0001_110 => { + inst.opcode = Opcode::AUTIB1716; + } + 0b0011_000 => { + inst.opcode = Opcode::PACIAZ; + } + 0b0011_001 => { + inst.opcode = Opcode::PACIASP; + } + 0b0011_010 => { + inst.opcode = Opcode::PACIBZ; + } + 0b0011_011 => { + inst.opcode = Opcode::PACIBSP; + } + 0b0011_100 => { + inst.opcode = Opcode::AUTIAZ; + } + 0b0011_101 => { + inst.opcode = Opcode::AUTIASP; + } + 0b0011_110 => { + inst.opcode = Opcode::AUTIBZ; + } + 0b0011_111 => { + inst.opcode = Opcode::AUTIBSP; + } + 0b0100_111 => { + inst.opcode = Opcode::PACM; + } + _ => { + inst.opcode = Opcode::HINT; + inst.operands = [ + Operand::ControlReg(CRm as u16), + Operand::Immediate(op2), + Operand::Nothing, + Operand::Nothing, + ]; + } + } }, 0b0011 => { match op2 { @@ -10377,7 +10615,15 @@ impl Decoder<ARMv8> for InstDecoder { }, 0b100 => { if CRm == 0b0000 { - inst.opcode = Opcode::SSSB; + inst.opcode = Opcode::SSBB; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } else if CRm == 0b0100 { + inst.opcode = Opcode::PSSBB; inst.operands = [ Operand::Nothing, Operand::Nothing, @@ -10604,22 +10850,44 @@ impl Decoder<ARMv8> for InstDecoder { Operand::Nothing, Operand::Nothing ]; - } else if (word & 0x1fffff) == 0x1f0bff { - inst.opcode = Opcode::RETAA; - inst.operands = [ - Operand::Nothing, - Operand::Nothing, - Operand::Nothing, - Operand::Nothing, - ]; - } else if (word & 0x1fffff) == 0x1f0fff { - inst.opcode = Opcode::RETAB; - inst.operands = [ - Operand::Nothing, - Operand::Nothing, - Operand::Nothing, - Operand::Nothing, - ]; + } else if (word & 0x1fffe0) == 0x1f0be0 { + let op4 = word & 0b11111; + if op4 == 0b11111 { + inst.opcode = Opcode::RETAA; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } else { + inst.opcode = Opcode::RETAASPPCR; + inst.operands = [ + Operand::Register(SizeCode::X, op4 as u16), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } + } else if (word & 0x1fffe0) == 0x1f0fe0 { + let op4 = word & 0b11111; + if op4 == 0b11111 { + inst.opcode = Opcode::RETAB; + inst.operands = [ + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } else { + inst.opcode = Opcode::RETABSPPCR; + inst.operands = [ + Operand::Register(SizeCode::X, op4 as u16), + Operand::Nothing, + Operand::Nothing, + Operand::Nothing, + ]; + } } else { inst.opcode = Opcode::Invalid; return Err(DecodeError::InvalidOpcode); |