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AgeCommit message (Expand)Author
7 daysmissing docsiximeow
7 dayssupport no-fmt buildsiximeow
7 daysclean out a few more TODOs that are TODONEiximeow
7 daysuse RegisterOrZero + new MemoryIndexed for indexed memory accessesiximeow
7 daysxeno's releaseiximeow
7 daysworking through a very long tail of one-off incompatibilitiesiximeow
7 dayshrfid, mtrsd(ish), lfdp, legacy svc, fpuiximeow
7 daysmostly doing dealias nowiximeow
7 daysfpu instructions existed in POWER1 and POWER2 tooiximeow
7 daysbig mix of small errorsiximeow
7 dayslfq register confusioniximeow
7 dayssign extend vspltis* *correctly*iximeow
7 daysextra isel rowiximeow
7 daysother small mixupsiximeow
7 daysisel wrong rowiximeow
7 daysPOWER2 is not "Power v2.0", some bit twiddling issuesiximeow
7 daysdquaq was off by oneiximeow
7 dayshandle immediate signedness betteriximeow
7 daysdquai .te is signediximeow
7 daysdfp pair handling issuesiximeow
7 daysthat makes a lot more sense: mulo was off by a row..iximeow
7 dayslwarx, mbar/eieioiximeow
7 daysddedpd, denbcdq, related confusioniximeow
7 daysmore transactional, hrfid, iseliximeow
7 daystransactional v2.07 + dozi operand orderiximeow
7 daysfloats, dcbtt should work, stfqxiximeow
7 daysfinally found a citation for old POWER1/POWER2 instructionsiximeow
7 daysdocs, ppc64iximeow
7 daysstart covering other later power instructions, maybeiximeow
7 daysgekko differential, paired singles supportiximeow
7 daysworking through differences vs ppcd, mostly ppc64 vs notiximeow
7 dayspreliminary Cell PPU comparisoniximeow
7 dayssupport altivec/non-power data stream instructionsiximeow
7 daysmisc cleanup, ripping out instruction/operand formatting overrides because th...iximeow
7 daysvmx128 is vmx128 onlyiximeow
7 daysdocsiximeow
7 daysmore test fixes and nonsense cleanupiximeow
7 daysdocs, fix warnings, display no-paniciximeow
7 dayswhacky alias ideaiximeow
7 daysmtmsr, cr bit parsing, crclriximeow
7 dayswip: displaystyle plumbingiximeow
7 daysi suppose API items should be publiciximeow
7 dayspaper over an LMA deficiency for nowiximeow
7 daysmtocrf, srdi, clrldi handling, plus lingering "crf"siximeow
7 daysyet another swing at branch handling...iximeow
7 dayssome immediates are logical (not signed)iximeow
7 daysit's xenia that prints the spr number backwards, also untangle mfocrfiximeow
7 daysclear all instruction state until i've got this more nuancediximeow
7 daysvcmpgefp assert, whoopsiximeow
7 daysaccessors for instruction operation bits...iximeow