diff options
| author | iximeow <me@iximeow.net> | 2026-05-03 17:48:14 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-05-25 01:33:18 +0000 |
| commit | 351adb926722b626a3fdc85b4d42303d37678fd3 (patch) | |
| tree | 4542a61752e272b559687377c53a77604f149c81 /src/protected_mode/vex.rs | |
| parent | 706ec278edebe06eff9f91f5cb30f5faba46132d (diff) | |
actually support avx/f16c in per-uarch decoding
Diffstat (limited to 'src/protected_mode/vex.rs')
| -rw-r--r-- | src/protected_mode/vex.rs | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/protected_mode/vex.rs b/src/protected_mode/vex.rs index 1b5c9d9..5fa46b9 100644 --- a/src/protected_mode/vex.rs +++ b/src/protected_mode/vex.rs @@ -2616,11 +2616,15 @@ fn read_vex_instruction< return Err(DecodeError::InvalidOpcode); }) }, - 0x1D => (Opcode::VCVTPS2PH, if L { - VEXOperandCode::E_xmm_G_ymm_imm8 + 0x1D => if instruction.prefixes.vex_unchecked().w() { + return Err(DecodeError::InvalidOpcode); } else { - VEXOperandCode::E_G_xmm_imm8 - }), + (Opcode::VCVTPS2PH, if L { + VEXOperandCode::E_xmm_G_ymm_imm8 + } else { + VEXOperandCode::E_G_xmm_imm8 + }) + }, 0x20 => (Opcode::VPINSRB, if L { return Err(DecodeError::InvalidOpcode); } else { |