yaxpeax-x86 - yaxpeax x86 decoder

Age	Commit message (Collapse)	Author
17 hours	fix jrcxz/jecxz/jcxz having "two operands"	iximeow

38 hours	2.1.0 is real!	iximeow

39 hours	reject arpl in 16-bit decoding	iximeow

39 hours	reword changelog	iximeow

39 hours	and some prefix helpers should be pub	iximeow

39 hours	j*cxz/pusha/popa alternate size forms	iximeow
	these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded.
2 days	add behavior information for x86_64 instructions	iximeow
	this is a squash of a few months' hacking, including but not limited to what eventually got extracted into https://git.iximeow.net/asmlinator/about/ the path here is generally not historically interesting, and the vast majority of this diff is very particular static data tables (BehaviorDigests and implicit operand lists) `src/long_mode/behavior.rs` will more or less be directly adapted into versions for x86-32 and x86-16, similar to the instruction decoders.
2 days	gpr register size in real/protected mode	iximeow

2 days	disallow 66-prefixed sha1rnds4	iximeow

2 days	pusha/popa/push-imm memory sizes	iximeow

2 days	working through a bunch of avx512 stuff, regspec constructors are const	iximeow

2 days	pextr*/extractps	iximeow

2 days	feature guard for key locker	iximeow

2 days	invept precision	iximeow

2 days	more precision for vinsert/vextract/vblendv{ps,pd}	iximeow

2 days	vmaskmovdqu, vmovq were also incorrect in some ways...	iximeow

2 days	more general avx improvements	iximeow

2 days	cleanup pass on vex-encoded instructions is going to be exciting	iximeow

2 days	report memory access size for "monitor"	iximeow

2 days	maskmov{q,dqu} memory access size	iximeow

2 days	more precise about 0f0d prefetch/nop	iximeow

2 days	fix table management instructions' ({l,s}{g,i,l}dt) mem_size	iximeow
	these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
2 days	more accurate mov seg-to-gpr operand size	iximeow

2 days	pushf, popf, enter, leave, xlat all have implicit memory access	iximeow
	also add "is_masked" to operand spec
2026-02-22	correct push-immediate memory access size	iximeow

2025-06-02	changelog should note ISA extension changes	iximeow

2024-06-24	rename most operand variants, make them structy rather than tupley	iximeow

2024-06-23	note yaxpeax-arch version bump in changelog	iximeow

2024-06-23	add additional `call` test cases	iximeow
	fix 32-bit 66-prefixed ff /2 call not having 16-bit operands fix momentary regression in rendering `call` instructions to string
2023-12-16	fix hreset being disassembled as having second operand of "Nothing"	iximeow
	just report it having one operand...
2023-12-16	fix incorrect register class names in long_mode1.2.1	iximeow
	also adjust changelog for a 1.2.1 version again, no new interfaces to go with these bugfixes.
2023-12-16	fix incorrect register selection for `vpbroadcastm{b2q,w2d}` with `rex.b` set	iximeow

2023-12-16	fix incorrect register selection for `vpmov*2m` with `rex.r` set	iximeow

2023-12-16	fix incorrect register selection for `vpmovm2*` with `rex.b` set	iximeow

2023-12-16	abnormal memory sizes for keylocker instructions are not bugs	iximeow
	new `does_not_decode_invalid_registers` fuzzer found other bugs! the 384-bit accesses for 128b keylocker instructions are an otherwise-unknown size and had a memory size of `BUG`. they are not bugs. give the memory size a real name.
2023-12-16	reword new changelog entries	iximeow

2023-12-15	update changelog, bump version number for future publish	iximeow

2023-07-24	1.2.0	iximeow

2023-07-24	fix handling of lar/lsl source register	iximeow

2023-07-23	fix inconsistently-poreted memory access size of vcvt{,t}{sd,si}	iximeow

2023-07-23	fix + better test cvttsd2si+cvtsd2si (misdecode under 64-bit)	iximeow

2023-07-16	forward changes along to 32-bit decoder...	iximeow

2023-07-08	fix v(p)gather situations, get vex tests passing again	iximeow

2023-07-04	fix some dancing between bank size and RegisterBank enum values	iximeow
	in the process, fixed a decoding bug dealing with a0/a1/a2/a3 movs (respected rex.b when rex.b should have been ignored) this seems to maybe improve runtime ever so slightly, but this is really meant as a cleanup commit more than anything.
2023-03-05	add `Opcode::is_jcc`, `Opcode::is_setcc`, and `Opcode::is_cmovcc` helpers	iximeow
	this request/suggestion comes from [github](https://github.com/iximeow/yaxpeax-x86/issues/29)! thank you!
2023-02-19	deprecate `pub fn cs`, which is an intensely embarrassing bug of a function	iximeow
	unlike every other function to test if a particular selector is picked by prefixes, `Prefixes::cs` does not return bool, nor does it check the currently-selected prefix. instead, it modifies the decoded `Prefixes` to set the current prefix to `cs`. this has been a bug all the way since 0.0.1 was released. the function now does nothing, and is marked deprecated. in a future 2.x release, the function will be changed to return `bool` and be in-line with other segment selector-checking functions. in the mean time, a new `Prefixes::selects_cs()` does the correct thing. thank you to @meithecatte who pointed this out in https://github.com/iximeow/yaxpeax-x86/issues/28!
2022-12-24	update old yaxpeax-arch versions in ffi crates to compatible versions	iximeow

2022-12-03	include typo fixes in the changelog!	iximeow

2022-12-03	describe optimizations included in 1.1.5	iximeow

2022-04-30	support 0x9a callf in 16/32-bit modes	iximeow