| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 9 hours | add behavior information for x86_64 instructions | iximeow | |
| this is a squash of a few months' hacking, including but not limited to what eventually got extracted into https://git.iximeow.net/asmlinator/about/ the path here is generally not historically interesting, and the vast majority of this diff is very particular static data tables (BehaviorDigests and implicit operand lists) `src/long_mode/behavior.rs` will more or less be directly adapted into versions for x86-32 and x86-16, similar to the instruction decoders. | |||
| 2024-06-24 | justify the current max instruction length | iximeow | |
| this is also checked by a new fuzz target | |||
| 2024-06-23 | update yaxpeax-arch to 0.3.1, fix fuzz target warnings | iximeow | |
| 2023-12-16 | fix opportunity for unhandled register synonyms | iximeow | |
| registers `al`, `cl`, `dl`, and `bl` could have two different representations - with `rex.w` and without. these two forms of `RegSpec` would not compare equal, nor has the same, so for code relying on `RegSpec` to faithfully represent a 1-1 mapping to x86 registers, these synonyms would introduce bugs in register analysis. for example, in `yaxpeax-core`, this would result in instructions writing to `rex.w al` not being visible as definitions for a future read of `!rex.w al`. fix this in `x86_64` code, add new test cases about the confusion, adjust register names to make this situation more clearly a bug, and introduce two new fuzz targets that would have helped spot this error. | |||
| 2022-01-12 | fuzz DisplayStyle::C and fix corresponding issues1.1.4 | iximeow | |
| 2021-12-19 | add in-tree cargo fuzz targets for decode and display impls | iximeow | |
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index : yaxpeax-x86 | |
| yaxpeax x86 decoder |
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