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17 hoursfix jrcxz/jecxz/jcxz having "two operands"iximeow
38 hourspush/pop width in 16/32-bit modes are receptive to operand width prefixiximeow
39 hoursreject arpl in 16-bit decodingiximeow
39 hoursand some prefix helpers should be pubiximeow
39 hoursj*cxz/pusha/popa alternate size formsiximeow
these all existed since forever but the library did not distinguish them and did not provide prefix information for users to tell which had been decoded.
2 daysadapt long-mode behavior support to protected mode and real modeiximeow
along the way, fix an error: maskmov is memory read-write. additionally, operand information about {push,pop}a{,d}.
2 daysadd behavior information for x86_64 instructionsiximeow
this is a squash of a few months' hacking, including but not limited to what eventually got extracted into https://git.iximeow.net/asmlinator/about/ the path here is generally not historically interesting, and the vast majority of this diff is very particular static data tables (BehaviorDigests and implicit operand lists) `src/long_mode/behavior.rs` will more or less be directly adapted into versions for x86-32 and x86-16, similar to the instruction decoders.
2 daysgpr register size in real/protected modeiximeow
2 daysdisallow 66-prefixed sha1rnds4iximeow
2 dayspusha/popa/push-imm memory sizesiximeow
2 dayshelpers to create cr0-cr7iximeow
2 daysworking through a bunch of avx512 stuff, regspec constructors are constiximeow
2 dayspextr*/extractpsiximeow
2 daysfeature guard for key lockeriximeow
2 daysinvept precisioniximeow
2 daysmore precision for vinsert/vextract/vblendv{ps,pd}iximeow
2 daysactually support avx/f16c in per-uarch decodingiximeow
2 daysvmaskmovdqu, vmovq were also incorrect in some ways...iximeow
2 daysmore general avx improvementsiximeow
2 dayscleanup pass on vex-encoded instructions is going to be excitingiximeow
2 daysreport memory access size for "monitor"iximeow
2 daysmaskmov{q,dqu} memory access sizeiximeow
2 daysmore precise about 0f0d prefetch/nopiximeow
2 daysfix table management instructions' ({l,s}{g,i,l}dt) mem_sizeiximeow
these instructions, it turns out, have fixed operand size based on CPU execution mode and regardless of prefixes. good to know!
2 daysmore accurate mov seg-to-gpr operand sizeiximeow
2 dayspush/pop for segment registers has implicit memory accessiximeow
2 dayspushf, popf, enter, leave, xlat all have implicit memory accessiximeow
also add "is_masked" to operand spec
2 daysadd initial stats for disasm stats in all modesiximeow
2026-02-22correct push-immediate memory access sizeiximeow
2026-02-14fair enough on those warningsiximeow
2026-02-14type aliases make some of these signatures less egregious..iximeow
2026-02-14uarch settings for apx, avx10.1, etc + nouns get capsiximeow
2025-06-013dnow was still supported on K8, K10. 32-bit mode should learn about uarch ↵iximeow
tweaks too
2025-06-01describe the per-isa extensions a bit betteriximeow
2025-06-01revise_instruction is the same on all bitnesses, so macro it tooiximeow
2025-06-01DecodeEverything wasn't useful, no better than InstDecoder::default()??iximeow
2025-06-01cpu feature bits are the same across 64/32/16-bitiximeow
2025-06-01expand isa feature selection to more bitsiximeow
this is backed by the new IsaSettings trait. the existing InstDecoders are unchanged, except that they implement this new trait. also add new `DecodeEverything` structs with `IsaSettings` impls that are unconditionally set to permit anything the decoder can be configured to conditionally accept or reject. in the process, add new `_3dnow` flag and stop accepting 3dnow instructions in uarch-specific decoder settings that would not have 3dnow instructions. update AMD microarchitectures and cross-ref chip directory
2024-06-24document one more stray unsafeiximeow
2024-06-24justify the current max instruction lengthiximeow
this is also checked by a new fuzz target
2024-06-24consistently enter register/number/opcode spansiximeow
2024-06-24one more stray docs erroriximeow
2024-06-24rename most operand variants, make them structy rather than tupleyiximeow
2024-06-23remove selects_cs(), cs() now does the right thingiximeow
2024-06-23nightly correctly remarked that == on fat pointers is ambiguousiximeow
2024-06-23fix several sources of dead code warnings in various crate configsiximeow
2024-06-23remove yaxpeax-x86 safer_unchecked.rs, it is now in yaxpeax-archiximeow
2024-06-23cfg_attr wants feature, not features pluraliximeow
2024-06-23last vestiges of initial perf experimentsiximeow
2024-06-23another fuzz bugiximeow