diff options
| author | rva3 <rva333@protonmail.com> | 2026-02-20 03:45:01 +0200 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-02-22 03:08:10 +0000 |
| commit | fa24eedf78fb9fe2d87ac3f59763e25d3ba4462f (patch) | |
| tree | f626db67bb33d750be7304c58dca3da260257f77 /CHANGELOG | |
| parent | 256c8128d82a5c5d99c1a114f3fb488b28d6b925 (diff) | |
support A1 encoding of several coprocessor instructions + SVC
initially was "implement MCR/MRC decoding", but expanded to include the
whole coprocessor space for completeness, and then SVC is right there
too.
Neon instructions in this space are still rejected, as neon support is
not really there yet.
Co-authored-by: iximeow <me@iximeow.net>
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -2,6 +2,11 @@ * ARMv7 instructions now impl Copy and Clone, matching A64 instructions and so many enums/structures from decoded instructions. +* ARMv7: expand support for coprocessor, SVC instructions. (thank you @rva333!) + * support non-Thumb encoding of SVC + * support non-`*2` forms of coprocessor instructions + * collapse `*2` encoding choice for coprocessor instructions into a paramter + on the opcode (rather than distinct opcodes) ## 0.4.0 |