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| author | iximeow <me@iximeow.net> | 2026-08-02 19:58:02 +0000 |
|---|---|---|
| committer | iximeow <me@iximeow.net> | 2026-08-02 19:58:02 +0000 |
| commit | fa428aefa6789c744e1e887a719fc2a07ad00188 (patch) | |
| tree | f8236bb0addeb42c62c77c70dc55e519a873b914 /CHANGELOG | |
| parent | 2037c3a87532f39963fb0e39ac06f0fffbb6ae2e (diff) | |
sufficiently advanced SIMD is indistinguishable from coprocessors
Diffstat (limited to 'CHANGELOG')
| -rw-r--r-- | CHANGELOG | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -16,6 +16,8 @@ saved) program status register, was reported as a banked GPR. * ARMv8: support thumb2 encoding of `Test Target` instruction, `Opcode::TT` (formatted as any of `tt`, `ttt`, `tta`, `ttat`) +* ARMv8: formerly-coprocessor instructions have been defined into SIMD extensions, + meaning some MRC/MCR/CDP instructions have become `DecodeError::Incomplete` several fixes from @Grond66: * ARMv7: support the RRX rotate mode. |