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authoriximeow <me@iximeow.net>2026-09-11 16:57:56 +0000
committeriximeow <me@iximeow.net>2026-09-11 16:57:56 +0000
commit9eebd279e4a523e009150786ca270f0e2330e0c3 (patch)
tree6c8ff475a50518e0a165fbb750ea840b26b79ec0 /CHANGELOG
parent475321a686f346ac51cded60384a903fa8e9fdf8 (diff)
report rounding bit of smmla/smmls
Diffstat (limited to 'CHANGELOG')
-rw-r--r--CHANGELOG2
1 files changed, 2 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 15a9c15..c19d6f3 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -36,6 +36,8 @@
the field is 1-based rather than 0-based, so for example an instruction which
had that operand as "1" was incorrectly decoded as being "0"
* thumb2: fix `hvc` immediate missing its upper four bits
+* thumb2: report "round" bit of `smmls` and `smmla` (as the new `smmlsr` and
+ `smmlar` opcodes)
* ARMv7: do not try to elide memory offset when 0 in postindex operands.
this makes a post-index (and implied writeback!) ambiguous with a pre-indexed
access with offset zero. that is, `[r1, 0]` may be written as `[r1]`, but