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authorGrond <grond@grondhaus.net>2026-06-24 14:54:05 -0700
committeriximeow <me@iximeow.net>2026-07-28 02:53:24 +0000
commitcb36e55f64ae1a941b20d2d6d6b5e546566072f8 (patch)
treefc4c16f8478b899f0ca377715110157c5985ad53 /CHANGELOG
parentc4015e7157ad07ffdd37f794ee77c5695a001059 (diff)
Decode the correct number of operands for CMP/CMN (immediate/register)
This also incidentally fixes an issue where MOV/MVN instructions with a shifted operand could be decoded as if they had 3 operands.
Diffstat (limited to 'CHANGELOG')
-rw-r--r--CHANGELOG2
1 files changed, 2 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 8229e4d..1bb05d3 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -17,6 +17,8 @@ several fixes from @Grond66:
* ARMv7: reject unconditional instructions with op1=1111xxxx. these were
decoded as CDP, MCR, or MRC when the bit pattern is actually undefined.
* ARMv7: fix inverted reserved bit test for some ldr*/str* (immediate) forms.
+* ARMv7: fix several issues with data processing instructions:
+ * CMP/CMN decoded "three operands" when they only have two.
thank you for the patches!