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AgeCommit message (Expand)Author
2026-07-28thumb2: fix parallel addition/subtraction, (un)signediximeow
2026-07-28thumb: when nonconforming, allow it/cond=1111 like capstoneiximeow
2026-07-28lsl/mov aliasingiximeow
2026-07-28differential testing wipiximeow
2026-07-28fix thumb2 TBH decode: wrong opcode and register-shift operandBrandon Ros
2026-07-28fix more thumb2 register data-processing decode bugsBrandon Ros
2026-07-28some armv7/thumb arms are basically duplicateiximeow
2026-07-28fix several thumb2 decode bugsBrandon Ros
2026-07-28Do not add an 's' when outputing opcodes that always set flagsGrond
2026-07-28Decode the correct number of operands for TST/TEQ (immediate/register)Grond
2026-07-28Simplify decoding of register-shifted-register data-processing instructionsGrond
2026-07-28probably should decide where imm-shifted reg normalization happensiximeow
2026-07-28Decode the correct number of operands for CMP/CMN (immediate/register)Grond
2026-07-28Fix the handling of reserved bits in uncommon loads/storesGrond
2026-07-28Check all of the appropriate bits when parsing op1 for CDP2/MCR2/MRC2Grond
2026-07-28Implement the RRX immediate shift typeGrond
2026-07-28Fix the handling of arithmetic register shifts with zero immediatesGrond
2026-06-19Add armv7::InstDecoder::in_thumb_mode() methodSamuel Arnold
2026-02-22support A1 encoding of several coprocessor instructions + SVCrva3
2026-02-22properly display coprocessor higher than 9rva3
2026-02-22rename MCR2/MRC2 to MCR/MRCrva3
2026-02-22derive Clone and Copy for armv7 instructionrva3
2025-10-19Remove empty format precision specifierMarijn Schouten
2025-10-19Opcode and Operand should be non-exhaustiveiximeow
2025-10-19avoid subtle changes to A64 Opcode enum discriminant choicesiximeow
2025-10-19tag instruction decode fixes, differential test precisioniximeow
2025-10-19fix opcode display for ldgMartin Fink
2025-10-19visitor-oriented fmtiximeow
2025-06-20changelog + another inlineiximeow
2025-06-02some armv7 decode helpers are trivial functions but didn't inlineiximeow
2025-05-25support the rest of PAC instructions. compare to a more recent capstoneiximeow
2024-06-25Bump yaxpeax-arch and bitvec, allow use of deprecated yaxpeax-arch traits, fi...novafacing
2024-06-25Add support for `udf`Martin Fink
2024-03-17at least armv7t doesnt panic now, but im very uncertain these are rightiximeow
2024-03-17ye olde "const array rebuilt in locals with simd but static is const" issueiximeow
2024-03-17ah uxtw/h fix introduced warningsiximeow
2024-03-17fix uxtb/uxth alias being incorrectly applied with x-size registersiximeow
2024-03-17when decoding invalid opcodes, return errors. better testing for this circums...iximeow
2024-03-17be more explicit about undefined system instructions being invalidiximeow
2024-03-17system instruction and register improvementsiximeow
2024-03-16ldrab and ldraa tests, fix immediate decodingiximeow
2024-03-16test dmb and make immediates shown with the immediate prefixiximeow
2024-03-16fix movi (immediate) to unpack immediate correctlyiximeow
2024-03-16fix ldrsw register sizeiximeow
2024-03-09improve msr register decodingiximeow
2024-03-09fix armv8 a64 decoder hint instructionsbelovdv
2023-11-02ah and a doc comment for the public method0.2.4iximeow
2023-11-02make RegShift::into_shift publicwscp
2023-01-31fix 24-bit branch immediate decodingjam1garner
2022-09-29Fix 32-bit conditional thumb branchesMitchell Johnson
generated by cgit v1.1 at 2026-09-11 21:24:58 +0000